Andre Przywara 90118bb5c1 refactor(cpufeat): rename ENABLE_SPE_FOR_LOWER_ELS to ENABLE_SPE_FOR_NS ... At the moment we hardcode the SPE functionality to be available on the non-secure side only, by setting MDCR_EL2.E2PB accordingly. This should be reflected in the feature selection symbol, so rename that to ENABLE_SPE_FOR_NS, to make it clearer that SPE is not supported in the secure world. Change-Id: I3f9b48eab1a45d6ccfcbb9c90a11eeb66867ad9a Signed-off-by: Andre Przywara <andre.przywara@arm.com>		2023-03-20 13:37:36 +00:00
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aarch64	Merge changes from topic "panic_cleanup" into integration	2023-02-23 23:38:26 +01:00
bl31.ld.S	build: always prefix section names with .	2023-02-20 18:29:33 +00:00
bl31.mk	refactor(cpufeat): rename ENABLE_SPE_FOR_LOWER_ELS to ENABLE_SPE_FOR_NS	2023-03-20 13:37:36 +00:00
bl31_context_mgmt.c	feat(rme): add context management changes for FEAT_RME	2021-10-05 18:41:35 +02:00
bl31_main.c	refactor(context-mgmt): move FEAT_HCX save/restore into C	2023-01-11 16:02:58 +00:00
bl31_traps.c	feat(fvp): emulate trapped RNDR	2022-12-21 12:59:36 +00:00
ehf.c	fix(bl31): allow use of EHF with S-EL2 SPMC	2022-08-30 08:29:25 -07:00
interrupt_mgmt.c	Use correct type when reading SCR register	2020-01-28 11:10:48 +00:00