Andre Przywara 8fa5592b84 allwinner: A64: Limit FDT checks to reduce code size ... The upcoming refactoring to support the new H616 SoCs will push the A64 build over the edge, by using more than the 48KB of SRAM available. To reduce the code size, set some libfdt options that aim to reduce sanity checks (for saving code space): - ASSUME_LATEST: only allow v17 DTBs (as created by dtc) - ASSUME_NO_ROLLBACK: don't prepare for failed DT additions - ASSUME_LIBFDT_ORDER: assume sane ordering, as done by dtc Change-Id: I12c93ec09e7587c5ae71e54947f817c32ce5fd6d Signed-off-by: Andre Przywara <andre.przywara@arm.com>		2021-03-25 13:28:35 +01:00
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common	allwinner: Allow conditional compilation of SCPI and native PSCI ops	2021-01-24 17:26:48 -06:00
sun50i_a64	allwinner: A64: Limit FDT checks to reduce code size	2021-03-25 13:28:35 +01:00
sun50i_h6	Merge changes I3703868b,Ie77476db into integration	2020-12-22 15:51:24 +00:00