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8ee2498039
The state-id field in the power-state parameter of a CPU_SUSPEND call can be
used to describe composite power states specific to a platform. The current PSCI
implementation does not interpret the state-id field. It relies on the target
power level and the state type fields in the power-state parameter to perform
state coordination and power management operations. The framework introduced
in this patch allows the PSCI implementation to intepret generic global states
like RUN, RETENTION or OFF from the State-ID to make global state coordination
decisions and reduce the complexity of platform ports. It adds support to
involve the platform in state coordination which facilitates the use of
composite power states and improves the support for entering standby states
at multiple power domains.
The patch also includes support for extended state-id format for the power
state parameter as specified by PSCIv1.0.
The PSCI implementation now defines a generic representation of the power-state
parameter. It depends on the platform port to convert the power-state parameter
(possibly encoding a composite power state) passed in a CPU_SUSPEND call to this
representation via the `validate_power_state()` plat_psci_ops handler. It is an
array where each index corresponds to a power level. Each entry contains the
local power state the power domain at that power level could enter.
The meaning of the local power state values is platform defined, and may vary
between levels in a single platform. The PSCI implementation constrains the
values only so that it can classify the state as RUN, RETENTION or OFF as
required by the specification:
* zero means RUN
* all OFF state values at all levels must be higher than all RETENTION
state values at all levels
* the platform provides PLAT_MAX_RET_STATE and PLAT_MAX_OFF_STATE values
to the framework
The platform also must define the macros PLAT_MAX_RET_STATE and
PLAT_MAX_OFF_STATE which lets the PSCI implementation find out which power
domains have been requested to enter a retention or power down state. The PSCI
implementation does not interpret the local power states defined by the
platform. The only constraint is that the PLAT_MAX_RET_STATE <
PLAT_MAX_OFF_STATE.
For a power domain tree, the generic implementation maintains an array of local
power states. These are the states requested for each power domain by all the
cores contained within the domain. During a request to place multiple power
domains in a low power state, the platform is passed an array of requested
power-states for each power domain through the plat_get_target_pwr_state()
API. It coordinates amongst these states to determine a target local power
state for the power domain. A default weak implementation of this API is
provided in the platform layer which returns the minimum of the requested
power-states back to the PSCI state coordination.
Finally, the plat_psci_ops power management handlers are passed the target
local power states for each affected power domain using the generic
representation described above. The platform executes operations specific to
these target states.
The platform power management handler for placing a power domain in a standby
state (plat_pm_ops_t.pwr_domain_standby()) is now only used as a fast path for
placing a core power domain into a standby or retention state should now be
used to only place the core power domain in a standby or retention state.
The extended state-id power state format can be enabled by setting the
build flag PSCI_EXTENDED_STATE_ID=1 and it is disabled by default.
Change-Id: I9d4123d97e179529802c1f589baaa4101759d80c
210 lines
9 KiB
C
210 lines
9 KiB
C
/*
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* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __PLATFORM_H__
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#define __PLATFORM_H__
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#include <stdint.h>
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#include <psci.h>
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/*******************************************************************************
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* Forward declarations
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******************************************************************************/
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struct meminfo;
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struct image_info;
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struct entry_point_info;
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struct bl31_params;
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/*******************************************************************************
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* plat_get_rotpk_info() flags
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******************************************************************************/
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#define ROTPK_IS_HASH (1 << 0)
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/*******************************************************************************
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* Function declarations
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******************************************************************************/
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/*******************************************************************************
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* Mandatory common functions
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******************************************************************************/
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uint64_t plat_get_syscnt_freq(void);
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int plat_get_image_source(unsigned int image_id,
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uintptr_t *dev_handle,
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uintptr_t *image_spec);
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unsigned long plat_get_ns_image_entrypoint(void);
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unsigned int plat_my_core_pos(void);
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int plat_core_pos_by_mpidr(unsigned long mpidr);
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/*******************************************************************************
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* Mandatory interrupt management functions
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******************************************************************************/
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uint32_t plat_ic_get_pending_interrupt_id(void);
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uint32_t plat_ic_get_pending_interrupt_type(void);
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uint32_t plat_ic_acknowledge_interrupt(void);
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uint32_t plat_ic_get_interrupt_type(uint32_t id);
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void plat_ic_end_of_interrupt(uint32_t id);
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uint32_t plat_interrupt_type_to_line(uint32_t type,
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uint32_t security_state);
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/*******************************************************************************
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* Optional common functions (may be overridden)
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******************************************************************************/
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unsigned long plat_get_my_stack(void);
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void plat_report_exception(unsigned long);
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int plat_crash_console_init(void);
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int plat_crash_console_putc(int c);
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/*******************************************************************************
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* Mandatory BL1 functions
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******************************************************************************/
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void bl1_early_platform_setup(void);
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void bl1_plat_arch_setup(void);
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void bl1_platform_setup(void);
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struct meminfo *bl1_plat_sec_mem_layout(void);
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/*
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* This function allows the platform to change the entrypoint information for
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* BL2, after BL1 has loaded BL2 into memory but before BL2 is executed.
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*/
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void bl1_plat_set_bl2_ep_info(struct image_info *image,
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struct entry_point_info *ep);
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/*******************************************************************************
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* Optional BL1 functions (may be overridden)
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******************************************************************************/
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void bl1_init_bl2_mem_layout(const struct meminfo *bl1_mem_layout,
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struct meminfo *bl2_mem_layout);
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/*******************************************************************************
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* Mandatory BL2 functions
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******************************************************************************/
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void bl2_early_platform_setup(struct meminfo *mem_layout);
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void bl2_plat_arch_setup(void);
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void bl2_platform_setup(void);
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struct meminfo *bl2_plat_sec_mem_layout(void);
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/*
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* This function returns a pointer to the shared memory that the platform has
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* kept aside to pass trusted firmware related information that BL3-1
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* could need
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*/
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struct bl31_params *bl2_plat_get_bl31_params(void);
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/*
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* This function returns a pointer to the shared memory that the platform
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* has kept to point to entry point information of BL31 to BL2
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*/
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struct entry_point_info *bl2_plat_get_bl31_ep_info(void);
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/*
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* This function flushes to main memory all the params that are
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* passed to BL3-1
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*/
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void bl2_plat_flush_bl31_params(void);
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/*
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* The next 2 functions allow the platform to change the entrypoint information
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* for the mandatory 3rd level BL images, BL3-1 and BL3-3. This is done after
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* BL2 has loaded those images into memory but before BL3-1 is executed.
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*/
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void bl2_plat_set_bl31_ep_info(struct image_info *image,
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struct entry_point_info *ep);
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void bl2_plat_set_bl33_ep_info(struct image_info *image,
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struct entry_point_info *ep);
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/* Gets the memory layout for BL3-3 */
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void bl2_plat_get_bl33_meminfo(struct meminfo *mem_info);
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/*******************************************************************************
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* Conditionally mandatory BL2 functions: must be implemented if BL3-0 image
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* is supported
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******************************************************************************/
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/* Gets the memory layout for BL3-0 */
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void bl2_plat_get_bl30_meminfo(struct meminfo *mem_info);
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/*
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* This function is called after loading BL3-0 image and it is used to perform
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* any platform-specific actions required to handle the SCP firmware.
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*/
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int bl2_plat_handle_bl30(struct image_info *bl30_image_info);
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/*******************************************************************************
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* Conditionally mandatory BL2 functions: must be implemented if BL3-2 image
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* is supported
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******************************************************************************/
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void bl2_plat_set_bl32_ep_info(struct image_info *image,
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struct entry_point_info *ep);
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/* Gets the memory layout for BL3-2 */
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void bl2_plat_get_bl32_meminfo(struct meminfo *mem_info);
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/*******************************************************************************
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* Optional BL2 functions (may be overridden)
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******************************************************************************/
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/*******************************************************************************
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* Mandatory BL3-1 functions
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******************************************************************************/
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void bl31_early_platform_setup(struct bl31_params *from_bl2,
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void *plat_params_from_bl2);
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void bl31_plat_arch_setup(void);
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void bl31_platform_setup(void);
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struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type);
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/*******************************************************************************
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* Mandatory PSCI functions (BL3-1)
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******************************************************************************/
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int plat_setup_psci_ops(const struct plat_psci_ops **);
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const unsigned char *plat_get_power_domain_tree_desc(void);
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/*******************************************************************************
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* Optional PSCI functions (BL3-1).
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******************************************************************************/
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plat_local_state_t plat_get_target_pwr_state(unsigned int lvl,
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const plat_local_state_t *states,
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unsigned int ncpu);
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/*******************************************************************************
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* Optional BL3-1 functions (may be overridden)
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******************************************************************************/
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void bl31_plat_enable_mmu(uint32_t flags);
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/*******************************************************************************
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* Optional BL3-2 functions (may be overridden)
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******************************************************************************/
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void bl32_plat_enable_mmu(uint32_t flags);
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/*******************************************************************************
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* Trusted Board Boot functions
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******************************************************************************/
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int plat_get_rotpk_info(void *cookie, void **key_ptr, unsigned int *key_len,
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unsigned int *flags);
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#endif /* __PLATFORM_H__ */
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