mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-28 16:11:49 +00:00
8d69a03f6a
- Check at link-time that bootloader images will fit in memory
at run time and that they won't overlap each other.
- Remove text and rodata orphan sections.
- Define new linker symbols to remove the need for platform setup
code to know the order of sections.
- Reduce the size of the raw binary images by cutting some sections
out of the disk image and allocating them at load time, whenever
possible.
- Rework alignment constraints on sections.
- Remove unused linker symbols.
- Homogenize linker symbols names across all BLs.
- Add some comments in the linker scripts.
Change-Id: I47a328af0ccc7c8ab47fcc0dc6e7dd26160610b9
143 lines
4.4 KiB
ArmAsm
143 lines
4.4 KiB
ArmAsm
/*
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* Copyright (c) 2013, ARM Limited. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <bl1.h>
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#include <bl_common.h>
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#include <platform.h>
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#include <arch.h>
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.globl bl31_entrypoint
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.section .text, "ax"; .align 3
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/* -----------------------------------------------------
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* bl31_entrypoint() is the cold boot entrypoint,
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* executed only by the primary cpu.
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* -----------------------------------------------------
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*/
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bl31_entrypoint:; .type bl31_entrypoint, %function
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/* ---------------------------------------------
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* BL2 has populated x0,x3,x4 with the opcode
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* indicating BL31 should be run, memory layout
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* of the trusted SRAM available to BL31 and
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* information about running the non-trusted
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* software already loaded by BL2.
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* ---------------------------------------------
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*/
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/* ---------------------------------------------
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* Set the exception vector to something sane.
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* ---------------------------------------------
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*/
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adr x1, runtime_exceptions
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msr vbar_el3, x1
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/* ---------------------------------------------
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* Enable the instruction cache.
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* ---------------------------------------------
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*/
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mrs x1, sctlr_el3
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orr x1, x1, #SCTLR_I_BIT
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msr sctlr_el3, x1
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isb
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/* ---------------------------------------------
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* Check the opcodes out of paranoia.
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* ---------------------------------------------
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*/
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mov x19, #RUN_IMAGE
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cmp x0, x19
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b.ne _panic
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mov x20, x3
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mov x21, x4
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/* ---------------------------------------------
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* This is BL31 which is expected to be executed
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* only by the primary cpu (at least for now).
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* So, make sure no secondary has lost its way.
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* ---------------------------------------------
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*/
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bl read_mpidr
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mov x19, x0
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bl platform_is_primary_cpu
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cbz x0, _panic
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/* --------------------------------------------
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* Give ourselves a small coherent stack to
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* ease the pain of initializing the MMU
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* --------------------------------------------
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*/
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mov x0, x19
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bl platform_set_coherent_stack
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/* ---------------------------------------------
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* Perform platform specific early arch. setup
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* ---------------------------------------------
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*/
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mov x0, x20
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mov x1, x21
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mov x2, x19
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bl bl31_early_platform_setup
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bl bl31_plat_arch_setup
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/* ---------------------------------------------
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* Give ourselves a stack allocated in Normal
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* -IS-WBWA memory
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* ---------------------------------------------
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*/
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mov x0, x19
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bl platform_set_stack
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/* ---------------------------------------------
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* Use SP_EL0 to initialize BL31. It allows us
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* to jump to the next image without having to
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* come back here to ensure all of the stack's
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* been popped out. run_image() is not nice
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* enough to reset the stack pointer before
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* handing control to the next stage.
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* ---------------------------------------------
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*/
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mov x0, sp
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msr sp_el0, x0
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msr spsel, #0
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isb
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/* ---------------------------------------------
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* Jump to main function.
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* ---------------------------------------------
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*/
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bl bl31_main
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_panic:
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b _panic
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