mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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8cec598ba3
The current code does not always use data and instruction barriers as required by the architecture and frequently uses barriers excessively due to their inclusion in all of the write_*() helper functions. Barriers should be used explicitly in assembler or C code when modifying processor state that requires the barriers in order to enable review of correctness of the code. This patch removes the barriers from the helper functions and introduces them as necessary elsewhere in the code. PORTING NOTE: check any port of Trusted Firmware for use of system register helper functions for reliance on the previous barrier behaviour and add explicit barriers as necessary. Fixes ARM-software/tf-issues#92 Change-Id: Ie63e187404ff10e0bdcb39292dd9066cb84c53bf
334 lines
5.9 KiB
ArmAsm
334 lines
5.9 KiB
ArmAsm
/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch.h>
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#include <asm_macros.S>
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.globl enable_irq
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.globl disable_irq
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.globl enable_fiq
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.globl disable_fiq
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.globl enable_serror
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.globl disable_serror
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.globl enable_debug_exceptions
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.globl disable_debug_exceptions
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.globl read_daif
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.globl write_daif
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.globl read_spsr
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.globl read_spsr_el1
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.globl read_spsr_el2
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.globl read_spsr_el3
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.globl write_spsr
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.globl write_spsr_el1
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.globl write_spsr_el2
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.globl write_spsr_el3
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.globl read_elr
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.globl read_elr_el1
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.globl read_elr_el2
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.globl read_elr_el3
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.globl write_elr
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.globl write_elr_el1
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.globl write_elr_el2
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.globl write_elr_el3
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.globl get_afflvl_shift
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.globl mpidr_mask_lower_afflvls
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.globl dsb
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.globl isb
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.globl sev
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.globl wfe
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.globl wfi
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.globl eret
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.globl smc
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.globl zeromem16
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.globl memcpy16
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func get_afflvl_shift
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cmp x0, #3
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cinc x0, x0, eq
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mov x1, #MPIDR_AFFLVL_SHIFT
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lsl x0, x0, x1
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ret
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func mpidr_mask_lower_afflvls
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cmp x1, #3
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cinc x1, x1, eq
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mov x2, #MPIDR_AFFLVL_SHIFT
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lsl x2, x1, x2
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lsr x0, x0, x2
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lsl x0, x0, x2
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ret
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/* -----------------------------------------------------
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* Asynchronous exception manipulation accessors
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* -----------------------------------------------------
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*/
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func enable_irq
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msr daifclr, #DAIF_IRQ_BIT
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ret
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func enable_fiq
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msr daifclr, #DAIF_FIQ_BIT
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ret
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func enable_serror
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msr daifclr, #DAIF_ABT_BIT
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ret
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func enable_debug_exceptions
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msr daifclr, #DAIF_DBG_BIT
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ret
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func disable_irq
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msr daifset, #DAIF_IRQ_BIT
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ret
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func disable_fiq
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msr daifset, #DAIF_FIQ_BIT
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ret
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func disable_serror
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msr daifset, #DAIF_ABT_BIT
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ret
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func disable_debug_exceptions
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msr daifset, #DAIF_DBG_BIT
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ret
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func read_daif
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mrs x0, daif
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ret
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func write_daif
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msr daif, x0
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ret
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func read_spsr
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mrs x0, CurrentEl
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cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
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b.eq read_spsr_el1
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cmp x0, #(MODE_EL2 << MODE_EL_SHIFT)
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b.eq read_spsr_el2
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cmp x0, #(MODE_EL3 << MODE_EL_SHIFT)
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b.eq read_spsr_el3
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func read_spsr_el1
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mrs x0, spsr_el1
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ret
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func read_spsr_el2
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mrs x0, spsr_el2
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ret
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func read_spsr_el3
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mrs x0, spsr_el3
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ret
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func write_spsr
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mrs x1, CurrentEl
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cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
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b.eq write_spsr_el1
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cmp x1, #(MODE_EL2 << MODE_EL_SHIFT)
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b.eq write_spsr_el2
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cmp x1, #(MODE_EL3 << MODE_EL_SHIFT)
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b.eq write_spsr_el3
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func write_spsr_el1
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msr spsr_el1, x0
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ret
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func write_spsr_el2
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msr spsr_el2, x0
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ret
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func write_spsr_el3
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msr spsr_el3, x0
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ret
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func read_elr
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mrs x0, CurrentEl
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cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
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b.eq read_elr_el1
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cmp x0, #(MODE_EL2 << MODE_EL_SHIFT)
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b.eq read_elr_el2
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cmp x0, #(MODE_EL3 << MODE_EL_SHIFT)
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b.eq read_elr_el3
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func read_elr_el1
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mrs x0, elr_el1
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ret
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func read_elr_el2
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mrs x0, elr_el2
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ret
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func read_elr_el3
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mrs x0, elr_el3
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ret
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func write_elr
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mrs x1, CurrentEl
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cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
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b.eq write_elr_el1
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cmp x1, #(MODE_EL2 << MODE_EL_SHIFT)
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b.eq write_elr_el2
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cmp x1, #(MODE_EL3 << MODE_EL_SHIFT)
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b.eq write_elr_el3
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func write_elr_el1
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msr elr_el1, x0
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ret
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func write_elr_el2
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msr elr_el2, x0
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ret
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func write_elr_el3
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msr elr_el3, x0
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ret
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func dsb
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dsb sy
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ret
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func isb
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isb
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ret
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func sev
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sev
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ret
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func wfe
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wfe
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ret
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func wfi
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wfi
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ret
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func eret
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eret
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func smc
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smc #0
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/* -----------------------------------------------------------------------
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* void zeromem16(void *mem, unsigned int length);
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*
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* Initialise a memory region to 0.
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* The memory address must be 16-byte aligned.
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* -----------------------------------------------------------------------
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*/
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func zeromem16
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add x2, x0, x1
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/* zero 16 bytes at a time */
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z_loop16:
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sub x3, x2, x0
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cmp x3, #16
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b.lt z_loop1
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stp xzr, xzr, [x0], #16
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b z_loop16
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/* zero byte per byte */
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z_loop1:
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cmp x0, x2
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b.eq z_end
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strb wzr, [x0], #1
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b z_loop1
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z_end: ret
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/* --------------------------------------------------------------------------
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* void memcpy16(void *dest, const void *src, unsigned int length)
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*
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* Copy length bytes from memory area src to memory area dest.
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* The memory areas should not overlap.
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* Destination and source addresses must be 16-byte aligned.
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* --------------------------------------------------------------------------
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*/
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func memcpy16
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/* copy 16 bytes at a time */
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m_loop16:
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cmp x2, #16
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b.lt m_loop1
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ldp x3, x4, [x1], #16
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stp x3, x4, [x0], #16
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sub x2, x2, #16
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b m_loop16
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/* copy byte per byte */
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m_loop1:
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cbz x2, m_end
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ldrb w3, [x1], #1
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strb w3, [x0], #1
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subs x2, x2, #1
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b.ne m_loop1
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m_end: ret
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