Sumit Garg 8cd37d7ba1 synquacer: Enable MMU using xlat_tables_v2 library ... BL31 runs from SRAM which is a non-coherent memory on synquacer. So enable MMU with SRAM memory marked as Non-Cacheable and mark page tables kept on SRAM as Non-Cacheable via XLAT_TABLE_NC flag. Also add page tables for Device address space. Signed-off-by: Sumit Garg <sumit.garg@linaro.org>		2018-06-21 11:23:03 +05:30
..
include	synquacer: Enable MMU using xlat_tables_v2 library	2018-06-21 11:23:03 +05:30
sq_bl31_setup.c	synquacer: Enable MMU using xlat_tables_v2 library	2018-06-21 11:23:03 +05:30
sq_ccn.c	synquacer: Enable CCN driver support	2018-06-21 11:22:48 +05:30
sq_gicv3.c	synquacer: Enable GICv3 support	2018-06-21 11:22:52 +05:30
sq_helpers.S	synquacer: Enable PL011 UART Console	2018-06-21 11:22:32 +05:30
sq_topology.c	synquacer: Implement topology functions	2018-06-21 11:22:42 +05:30
sq_xlat_setup.c	synquacer: Enable MMU using xlat_tables_v2 library	2018-06-21 11:23:03 +05:30