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4c700c1563
Align entire TF-A to use Arm in copyright header. Change-Id: Ief9992169efdab61d0da6bd8c5180de7a4bc2244 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
65 lines
1.6 KiB
C
65 lines
1.6 KiB
C
/*
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* Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <common/debug.h>
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#include "lib/xlat_mpu/xlat_mpu.h"
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#include <lib/xlat_tables/xlat_tables_defs.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include "xlat_mpu_private.h"
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#include <fvp_r_arch_helpers.h>
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#include <platform_def.h>
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#warning "xlat_mpu library is currently experimental and its API may change in future."
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/*
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* MMU configuration register values for the active translation context. Used
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* from the MMU assembly helpers.
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*/
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uint64_t mmu_cfg_params[MMU_CFG_PARAM_MAX];
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/*
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* Allocate and initialise the default translation context for the BL image
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* currently executing.
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*/
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REGISTER_XLAT_CONTEXT(tf, MAX_MMAP_REGIONS, MAX_XLAT_TABLES,
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PLAT_VIRT_ADDR_SPACE_SIZE, PLAT_PHY_ADDR_SPACE_SIZE);
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void mmap_add(const mmap_region_t *mm)
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{
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mmap_add_ctx(&tf_xlat_ctx, mm);
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}
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void __init init_xlat_tables(void)
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{
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assert(tf_xlat_ctx.xlat_regime == EL_REGIME_INVALID);
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unsigned int current_el = xlat_arch_current_el();
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if (current_el == 1U) {
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tf_xlat_ctx.xlat_regime = EL1_EL0_REGIME;
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} else {
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assert(current_el == 2U);
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tf_xlat_ctx.xlat_regime = EL2_REGIME;
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}
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/* Note: If EL3 is supported in future v8-R64, add EL3 assignment */
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init_xlat_tables_ctx(&tf_xlat_ctx);
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}
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int xlat_get_mem_attributes(uintptr_t base_va, uint32_t *attr)
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{
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return xlat_get_mem_attributes_ctx(&tf_xlat_ctx, base_va, attr);
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}
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void enable_mpu_el2(unsigned int flags)
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{
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/* EL2 is strictly MPU on v8-R64, so no need for setup_mpu_cfg() */
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enable_mpu_direct_el2(flags);
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}
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