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8913047a52
Cortex A78 AE erratum 1951502 is a Cat B erratum that applies to revisions <= r0p1. It is still open. This erratum is avoided by inserting a DMB ST before acquire atomic instructions without release semantics through a series of writes to implementation defined system registers. SDEN is available at https://developer.arm.com/documentation/SDEN1707912/0900 Change-Id: I812c5a37cdd03486df8af6046d9fa988f6a0a098 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> |
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| .. | ||
| _static/css | ||
| about | ||
| components | ||
| design | ||
| design_documents | ||
| getting_started | ||
| perf | ||
| plat | ||
| process | ||
| resources | ||
| security_advisories | ||
| threat_model | ||
| change-log.rst | ||
| conf.py | ||
| global_substitutions.txt | ||
| glossary.rst | ||
| index.rst | ||
| license.rst | ||
| Makefile | ||
| requirements.txt | ||