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https://github.com/ARM-software/arm-trusted-firmware.git
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890b508820
Add header file to help with creation of SPMD logical partitions. Also update linker files to create sections to record SPMD logical partitions declared. This follows the same pattern as the EL3 SPMC's logical partitions. This patch also adds initialization of SPMD logical partitions when the SPMD comes up. ENABLE_SPMD_LP is a build flag that is used to enable support for SPMD logical partitions. Note that the approach chosen is to keep SPMD and SPMC logical partition support separate, as opposed to extend the existing SPMC logical partition support since the code would need to have a number of ifdefs and the interactions with various build options such as SPMC_AT_EL3 needs to be accounted for, which would make code more complicated. Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com> Change-Id: I9642ddbf6ea26dd3f4a283baec598d61c07e3661
199 lines
7.2 KiB
C
199 lines
7.2 KiB
C
/*
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* Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef BL_COMMON_H
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#define BL_COMMON_H
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#include <common/ep_info.h>
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#include <common/param_header.h>
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#include <lib/utils_def.h>
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#ifndef __ASSEMBLER__
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#include <stddef.h>
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#include <stdint.h>
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#include <lib/cassert.h>
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#endif /* __ASSEMBLER__ */
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#include <export/common/bl_common_exp.h>
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#define UP U(1)
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#define DOWN U(0)
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/*******************************************************************************
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* Constants to identify the location of a memory region in a given memory
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* layout.
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******************************************************************************/
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#define TOP U(0x1)
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#define BOTTOM U(0x0)
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/*******************************************************************************
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* Constants to indicate type of exception to the common exception handler.
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******************************************************************************/
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#define SYNC_EXCEPTION_SP_EL0 U(0x0)
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#define IRQ_SP_EL0 U(0x1)
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#define FIQ_SP_EL0 U(0x2)
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#define SERROR_SP_EL0 U(0x3)
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#define SYNC_EXCEPTION_SP_ELX U(0x4)
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#define IRQ_SP_ELX U(0x5)
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#define FIQ_SP_ELX U(0x6)
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#define SERROR_SP_ELX U(0x7)
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#define SYNC_EXCEPTION_AARCH64 U(0x8)
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#define IRQ_AARCH64 U(0x9)
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#define FIQ_AARCH64 U(0xa)
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#define SERROR_AARCH64 U(0xb)
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#define SYNC_EXCEPTION_AARCH32 U(0xc)
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#define IRQ_AARCH32 U(0xd)
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#define FIQ_AARCH32 U(0xe)
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#define SERROR_AARCH32 U(0xf)
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/*
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* Mapping to connect linker symbols from .ld.S with their counterparts
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* from .scat for the BL31 image
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*/
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#if defined(USE_ARM_LINK)
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#define __BL31_END__ Load$$LR$$LR_END$$Base
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#define __BSS_START__ Load$$LR$$LR_BSS$$Base
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#define __BSS_END__ Load$$LR$$LR_BSS$$Limit
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#define __BSS_SIZE__ Load$$LR$$LR_BSS$$Length
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#define __COHERENT_RAM_START__ Load$$LR$$LR_COHERENT_RAM$$Base
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#define __COHERENT_RAM_END_UNALIGNED__ Load$$__COHERENT_RAM_EPILOGUE_UNALIGNED__$$Base
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#define __COHERENT_RAM_END__ Load$$LR$$LR_COHERENT_RAM$$Limit
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#define __COHERENT_RAM_UNALIGNED_SIZE__ Load$$__COHERENT_RAM__$$Length
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#define __CPU_OPS_START__ Load$$__CPU_OPS__$$Base
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#define __CPU_OPS_END__ Load$$__CPU_OPS__$$Limit
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#define __DATA_START__ Load$$__DATA__$$Base
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#define __DATA_END__ Load$$__DATA__$$Limit
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#define __GOT_START__ Load$$__GOT__$$Base
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#define __GOT_END__ Load$$__GOT__$$Limit
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#define __PERCPU_BAKERY_LOCK_START__ Load$$__BAKERY_LOCKS__$$Base
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#define __PERCPU_BAKERY_LOCK_END__ Load$$__BAKERY_LOCKS_EPILOGUE__$$Base
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#define __PMF_SVC_DESCS_START__ Load$$__PMF_SVC_DESCS__$$Base
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#define __PMF_SVC_DESCS_END__ Load$$__PMF_SVC_DESCS__$$Limit
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#define __PMF_TIMESTAMP_START__ Load$$__PMF_TIMESTAMP__$$Base
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#define __PMF_TIMESTAMP_END__ Load$$__PER_CPU_TIMESTAMPS__$$Limit
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#define __PMF_PERCPU_TIMESTAMP_END__ Load$$__PMF_TIMESTAMP_EPILOGUE__$$Base
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#define __RELA_END__ Load$$__RELA__$$Limit
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#define __RELA_START__ Load$$__RELA__$$Base
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#define __RODATA_START__ Load$$__RODATA__$$Base
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#define __RODATA_END__ Load$$__RODATA_EPILOGUE__$$Base
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#define __RT_SVC_DESCS_START__ Load$$__RT_SVC_DESCS__$$Base
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#define __RT_SVC_DESCS_END__ Load$$__RT_SVC_DESCS__$$Limit
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#if SPMC_AT_EL3
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#define __EL3_LP_DESCS_START__ Load$$__EL3_LP_DESCS__$$Base
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#define __EL3_LP_DESCS_END__ Load$$__EL3_LP_DESCS__$$Limit
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#endif
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#if ENABLE_SPMD_LP
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#define __SPMD_LP_DESCS_START__ Load$$__SPMD_LP_DESCS__$$Base
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#define __SPMD_LP_DESCS_END__ Load$$__SPMD_LP_DESCS__$$Limit
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#endif
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#define __RW_START__ Load$$LR$$LR_RW_DATA$$Base
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#define __RW_END__ Load$$LR$$LR_END$$Base
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#define __SPM_SHIM_EXCEPTIONS_START__ Load$$__SPM_SHIM_EXCEPTIONS__$$Base
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#define __SPM_SHIM_EXCEPTIONS_END__ Load$$__SPM_SHIM_EXCEPTIONS_EPILOGUE__$$Base
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#define __STACKS_START__ Load$$__STACKS__$$Base
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#define __STACKS_END__ Load$$__STACKS__$$Limit
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#define __TEXT_START__ Load$$__TEXT__$$Base
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#define __TEXT_END__ Load$$__TEXT_EPILOGUE__$$Base
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#endif /* USE_ARM_LINK */
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#ifndef __ASSEMBLER__
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/*
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* Declarations of linker defined symbols to help determine memory layout of
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* BL images
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*/
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#if SEPARATE_CODE_AND_RODATA
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IMPORT_SYM(uintptr_t, __TEXT_START__, BL_CODE_BASE);
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IMPORT_SYM(uintptr_t, __TEXT_END__, BL_CODE_END);
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IMPORT_SYM(uintptr_t, __RODATA_START__, BL_RO_DATA_BASE);
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IMPORT_SYM(uintptr_t, __RODATA_END__, BL_RO_DATA_END);
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#else
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IMPORT_SYM(uintptr_t, __RO_START__, BL_CODE_BASE);
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IMPORT_SYM(uintptr_t, __RO_END__, BL_CODE_END);
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#endif
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#if SEPARATE_NOBITS_REGION
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IMPORT_SYM(uintptr_t, __NOBITS_START__, BL_NOBITS_BASE);
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IMPORT_SYM(uintptr_t, __NOBITS_END__, BL_NOBITS_END);
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#endif
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IMPORT_SYM(uintptr_t, __RW_END__, BL_END);
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#if defined(IMAGE_BL1)
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IMPORT_SYM(uintptr_t, __BL1_ROM_END__, BL1_ROM_END);
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IMPORT_SYM(uintptr_t, __BL1_RAM_START__, BL1_RAM_BASE);
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IMPORT_SYM(uintptr_t, __BL1_RAM_END__, BL1_RAM_LIMIT);
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#elif defined(IMAGE_BL2)
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IMPORT_SYM(uintptr_t, __BL2_END__, BL2_END);
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#elif defined(IMAGE_BL2U)
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IMPORT_SYM(uintptr_t, __BL2U_END__, BL2U_END);
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#elif defined(IMAGE_BL31)
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IMPORT_SYM(uintptr_t, __BL31_START__, BL31_START);
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IMPORT_SYM(uintptr_t, __BL31_END__, BL31_END);
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#elif defined(IMAGE_BL32)
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IMPORT_SYM(uintptr_t, __BL32_END__, BL32_END);
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#elif defined(IMAGE_RMM)
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IMPORT_SYM(uintptr_t, __RMM_END__, RMM_END);
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#endif /* IMAGE_BLX */
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/* The following symbols are only exported from the BL2 at EL3 linker script. */
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#if BL2_IN_XIP_MEM && defined(IMAGE_BL2)
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IMPORT_SYM(uintptr_t, __BL2_ROM_END__, BL2_ROM_END);
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IMPORT_SYM(uintptr_t, __BL2_RAM_START__, BL2_RAM_BASE);
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IMPORT_SYM(uintptr_t, __BL2_RAM_END__, BL2_RAM_END);
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#endif /* BL2_IN_XIP_MEM */
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/*
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* The next 2 constants identify the extents of the coherent memory region.
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* These addresses are used by the MMU setup code and therefore they must be
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* page-aligned. It is the responsibility of the linker script to ensure that
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* __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
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* page-aligned addresses.
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*/
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#if USE_COHERENT_MEM
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IMPORT_SYM(uintptr_t, __COHERENT_RAM_START__, BL_COHERENT_RAM_BASE);
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IMPORT_SYM(uintptr_t, __COHERENT_RAM_END__, BL_COHERENT_RAM_END);
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#endif
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/*******************************************************************************
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* Structure used for telling the next BL how much of a particular type of
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* memory is available for its use and how much is already used.
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******************************************************************************/
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typedef struct meminfo {
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uintptr_t total_base;
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size_t total_size;
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} meminfo_t;
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/*******************************************************************************
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* Function & variable prototypes
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******************************************************************************/
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int load_auth_image(unsigned int image_id, image_info_t *image_data);
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#if TRUSTED_BOARD_BOOT && defined(DYN_DISABLE_AUTH)
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/*
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* API to dynamically disable authentication. Only meant for development
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* systems.
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*/
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void dyn_disable_auth(void);
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#endif
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extern const char build_message[];
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extern const char version_string[];
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const char *get_version(void);
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void print_entry_point_info(const entry_point_info_t *ep_info);
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uintptr_t page_align(uintptr_t value, unsigned dir);
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struct mmap_region;
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void setup_page_tables(const struct mmap_region *bl_regions,
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const struct mmap_region *plat_regions);
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void bl_handle_pauth(void);
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#endif /*__ASSEMBLER__*/
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#endif /* BL_COMMON_H */
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