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https://github.com/ARM-software/arm-trusted-firmware.git
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0ee80f35a2
Sometimes when changing UART clock from TBG to XTAL, UART HW enters into some broken state. It does not transit characters from TX FIFO anymore and TX FIFO stays always empty. TX FIFO reset does not recover UART HW from this broken state. Experiments show that external reset can fix UART HW from this broken state. TF-A fatal error handler calls console_a3700_core_init() function to initialize UART HW. This handler may be called anytime during CPU runtime, also when kernel is running. U-Boot or Linux kernel may change UART clock to TBG to achieve higher baudrates. During initialization, console_a3700_core_init() resets UART configuration to default settings, which means that it also changes UART clock from TBG to XTAL. Do an external reset of UART via North Bridge Peripheral reset register to prevent this UART hangup. Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I8990bce24d1a6fd8ccc47a2cd0a5ff932fcfcf14
74 lines
2.4 KiB
C
74 lines
2.4 KiB
C
/*
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* Copyright (C) 2016 Marvell International Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* https://spdx.org/licenses
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*/
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#ifndef A3700_CONSOLE_H
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#define A3700_CONSOLE_H
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#include <drivers/console.h>
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#include <platform_def.h>
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/* MVEBU UART Registers */
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#define UART_RX_REG 0x00
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#define UART_TX_REG 0x04
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#define UART_CTRL_REG 0x08
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#define UART_STATUS_REG 0x0c
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#define UART_BAUD_REG 0x10
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#define UART_POSSR_REG 0x14
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/* FIFO Control Register bits */
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#define UARTFCR_FIFOMD_16450 (0 << 6)
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#define UARTFCR_FIFOMD_16550 (1 << 6)
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#define UARTFCR_RXTRIG_1 (0 << 6)
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#define UARTFCR_RXTRIG_4 (1 << 6)
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#define UARTFCR_RXTRIG_8 (2 << 6)
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#define UARTFCR_RXTRIG_16 (3 << 6)
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#define UARTFCR_TXTRIG_1 (0 << 4)
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#define UARTFCR_TXTRIG_4 (1 << 4)
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#define UARTFCR_TXTRIG_8 (2 << 4)
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#define UARTFCR_TXTRIG_16 (3 << 4)
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#define UARTFCR_DMAEN (1 << 3) /* Enable DMA mode */
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#define UARTFCR_TXCLR (1 << 2) /* Clear contents of Tx FIFO */
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#define UARTFCR_RXCLR (1 << 1) /* Clear contents of Rx FIFO */
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#define UARTFCR_FIFOEN (1 << 0) /* Enable the Tx/Rx FIFO */
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/* Line Control Register bits */
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#define UARTLCR_DLAB (1 << 7) /* Divisor Latch Access */
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#define UARTLCR_SETB (1 << 6) /* Set BREAK Condition */
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#define UARTLCR_SETP (1 << 5) /* Set Parity to LCR[4] */
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#define UARTLCR_EVEN (1 << 4) /* Even Parity Format */
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#define UARTLCR_PAR (1 << 3) /* Parity */
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#define UARTLCR_STOP (1 << 2) /* Stop Bit */
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#define UARTLCR_WORDSZ_5 0 /* Word Length of 5 */
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#define UARTLCR_WORDSZ_6 1 /* Word Length of 6 */
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#define UARTLCR_WORDSZ_7 2 /* Word Length of 7 */
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#define UARTLCR_WORDSZ_8 3 /* Word Length of 8 */
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/* Line Status Register bits */
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#define UARTLSR_TXFIFOFULL (1 << 11) /* Tx Fifo Full */
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#define UARTLSR_TXEMPTY (1 << 6) /* Tx Empty */
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#define UARTLSR_RXRDY (1 << 4) /* Rx Ready */
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/* UART Control Register bits */
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#define UART_CTRL_RXFIFO_RESET (1 << 14)
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#define UART_CTRL_TXFIFO_RESET (1 << 15)
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#ifndef __ASSEMBLER__
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#include <stdint.h>
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/*
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* Initialize a new a3700 console instance and register it with the console
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* framework. The |console| pointer must point to storage that will be valid
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* for the lifetime of the console, such as a global or static local variable.
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* Its contents will be reinitialized from scratch.
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*/
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int console_a3700_register(uintptr_t baseaddr, uint32_t clock, uint32_t baud,
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console_t *console);
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#endif /*__ASSEMBLER__*/
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#endif /* A3700_CONSOLE_H */
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