mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-08 05:43:53 +00:00
83ec7e452c
The current code is incredibly resilient to updates to the spec and has worked quite well so far. However, recent implementations expose a weakness in that this is rather slow. A large part of it is written in assembly, making it opaque to the compiler for optimisations. The future proofness requires reading registers that are effectively `volatile`, making it even harder for the compiler, as well as adding lots of implicit barriers, making it hard for the microarchitecutre to optimise as well. We can make a few assumptions, checked by a few well placed asserts, and remove a lot of this burden. For a start, at the moment there are 4 group 0 counters with static assignments. Contexting them is a trivial affair that doesn't need a loop. Similarly, there can only be up to 16 group 1 counters. Contexting them is a bit harder, but we can do with a single branch with a falling through switch. If/when both of these change, we have a pair of asserts and the feature detection mechanism to guard us against pretending that we support something we don't. We can drop contexting of the offset registers. They are fully accessible by EL2 and as such are its responsibility to preserve on powerdown. Another small thing we can do, is pass the core_pos into the hook. The caller already knows which core we're running on, we don't need to call this non-trivial function again. Finally, knowing this, we don't really need the auxiliary AMUs to be described by the device tree. Linux doesn't care at the moment, and any information we need for EL3 can be neatly placed in a simple array. All of this, combined with lifting the actual saving out of assembly, reduces the instructions to save the context from 180 to 40, including a lot fewer branches. The code is also much shorter and easier to read. Also propagate to aarch32 so that the two don't diverge too much. Change-Id: Ib62e6e9ba5be7fb9fb8965c8eee148d5598a5361 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
101 lines
2 KiB
C
101 lines
2 KiB
C
/*
|
|
* Copyright (c) 2017-2025, Arm Limited and Contributors. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: BSD-3-Clause
|
|
*/
|
|
|
|
#ifndef AMU_H
|
|
#define AMU_H
|
|
|
|
#include <stdbool.h>
|
|
#include <stdint.h>
|
|
|
|
#include <context.h>
|
|
|
|
#include <platform_def.h>
|
|
|
|
#if ENABLE_FEAT_AMU
|
|
#if __aarch64__
|
|
void amu_enable(cpu_context_t *ctx);
|
|
void amu_init_el3(unsigned int core_pos);
|
|
void amu_init_el2_unused(void);
|
|
void amu_enable_per_world(per_world_context_t *per_world_ctx);
|
|
#else
|
|
void amu_enable(bool el2_unused);
|
|
#endif /* __aarch64__ */
|
|
|
|
#else
|
|
#if __aarch64__
|
|
void amu_enable(cpu_context_t *ctx)
|
|
{
|
|
}
|
|
void amu_init_el3(unsigned int core_pos)
|
|
{
|
|
}
|
|
void amu_init_el2_unused(void)
|
|
{
|
|
}
|
|
void amu_enable_per_world(per_world_context_t *per_world_ctx)
|
|
{
|
|
}
|
|
#else
|
|
static inline void amu_enable(bool el2_unused)
|
|
{
|
|
}
|
|
#endif /*__aarch64__ */
|
|
#endif /* ENABLE_FEAT_AMU */
|
|
|
|
/*
|
|
* Per-core list of the counters to be enabled. Value will be written into
|
|
* AMCNTENSET1_EL0 verbatim.
|
|
*/
|
|
#if ENABLE_AMU_AUXILIARY_COUNTERS
|
|
extern uint16_t plat_amu_aux_enables[PLATFORM_CORE_COUNT];
|
|
#endif
|
|
|
|
#define CTX_AMU_GRP0_ALL U(4)
|
|
#define CTX_AMU_GRP1_ALL U(16)
|
|
|
|
typedef struct amu_regs {
|
|
u_register_t grp0[CTX_AMU_GRP0_ALL];
|
|
#if ENABLE_AMU_AUXILIARY_COUNTERS
|
|
u_register_t grp1[CTX_AMU_GRP1_ALL];
|
|
#endif
|
|
} amu_regs_t;
|
|
|
|
static inline u_register_t read_amu_grp0_ctx_reg(amu_regs_t *ctx, size_t index)
|
|
{
|
|
return ctx->grp0[index];
|
|
}
|
|
|
|
static inline void write_amu_grp0_ctx_reg(amu_regs_t *ctx, size_t index, u_register_t val)
|
|
{
|
|
ctx->grp0[index] = val;
|
|
}
|
|
|
|
static inline uint16_t get_amu_aux_enables(size_t index)
|
|
{
|
|
#if ENABLE_AMU_AUXILIARY_COUNTERS
|
|
return plat_amu_aux_enables[index];
|
|
#else
|
|
return 0;
|
|
#endif
|
|
}
|
|
|
|
static inline u_register_t read_amu_grp1_ctx_reg(amu_regs_t *ctx, size_t index)
|
|
{
|
|
#if ENABLE_AMU_AUXILIARY_COUNTERS
|
|
return ctx->grp1[index];
|
|
#else
|
|
return 0;
|
|
#endif
|
|
}
|
|
|
|
static inline void write_amu_grp1_ctx_reg(amu_regs_t *ctx, size_t index, u_register_t val)
|
|
{
|
|
#if ENABLE_AMU_AUXILIARY_COUNTERS
|
|
ctx->grp1[index] = val;
|
|
#endif
|
|
}
|
|
|
|
#endif /* AMU_H */
|