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83ec7e452c
The current code is incredibly resilient to updates to the spec and has worked quite well so far. However, recent implementations expose a weakness in that this is rather slow. A large part of it is written in assembly, making it opaque to the compiler for optimisations. The future proofness requires reading registers that are effectively `volatile`, making it even harder for the compiler, as well as adding lots of implicit barriers, making it hard for the microarchitecutre to optimise as well. We can make a few assumptions, checked by a few well placed asserts, and remove a lot of this burden. For a start, at the moment there are 4 group 0 counters with static assignments. Contexting them is a trivial affair that doesn't need a loop. Similarly, there can only be up to 16 group 1 counters. Contexting them is a bit harder, but we can do with a single branch with a falling through switch. If/when both of these change, we have a pair of asserts and the feature detection mechanism to guard us against pretending that we support something we don't. We can drop contexting of the offset registers. They are fully accessible by EL2 and as such are its responsibility to preserve on powerdown. Another small thing we can do, is pass the core_pos into the hook. The caller already knows which core we're running on, we don't need to call this non-trivial function again. Finally, knowing this, we don't really need the auxiliary AMUs to be described by the device tree. Linux doesn't care at the moment, and any information we need for EL3 can be neatly placed in a simple array. All of this, combined with lifting the actual saving out of assembly, reduces the instructions to save the context from 180 to 40, including a lot fewer branches. The code is also much shorter and easier to read. Also propagate to aarch32 so that the two don't diverge too much. Change-Id: Ib62e6e9ba5be7fb9fb8965c8eee148d5598a5361 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
206 lines
7.3 KiB
C
206 lines
7.3 KiB
C
/*
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* Copyright (c) 2019-2025, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef ARCH_FEATURES_H
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#define ARCH_FEATURES_H
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#include <stdbool.h>
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#include <arch_helpers.h>
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#include <common/feat_detect.h>
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#define ISOLATE_FIELD(reg, feat, mask) \
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((unsigned int)(((reg) >> (feat)) & mask))
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#define CREATE_FEATURE_SUPPORTED(name, read_func, guard) \
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__attribute__((always_inline)) \
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static inline bool is_ ## name ## _supported(void) \
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{ \
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if ((guard) == FEAT_STATE_DISABLED) { \
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return false; \
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} \
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if ((guard) == FEAT_STATE_ALWAYS) { \
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return true; \
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} \
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return read_func(); \
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}
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#define CREATE_FEATURE_PRESENT(name, idreg, idfield, mask, idval) \
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__attribute__((always_inline)) \
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static inline bool is_ ## name ## _present(void) \
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{ \
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return (ISOLATE_FIELD(read_ ## idreg(), idfield, mask) >= idval) \
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? true : false; \
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}
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#define CREATE_FEATURE_FUNCS(name, idreg, idfield, mask, idval, guard) \
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CREATE_FEATURE_PRESENT(name, idreg, idfield, mask, idval) \
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CREATE_FEATURE_SUPPORTED(name, is_ ## name ## _present, guard)
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/*
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* +----------------------------+
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* | Features supported |
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* +----------------------------+
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* | GENTIMER |
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* +----------------------------+
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* | FEAT_TTCNP |
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* +----------------------------+
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* | FEAT_AMU |
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* +----------------------------+
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* | FEAT_AMUV1P1 |
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* +----------------------------+
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* | FEAT_TRF |
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* +----------------------------+
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* | FEAT_SYS_REG_TRACE |
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* +----------------------------+
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* | FEAT_DIT |
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* +----------------------------+
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* | FEAT_PAN |
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* +----------------------------+
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* | FEAT_SSBS |
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* +----------------------------+
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* | FEAT_PMUV3 |
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* +----------------------------+
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* | FEAT_MTPMU |
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* +----------------------------+
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*/
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/* GENTIMER */
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__attribute__((always_inline))
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static inline bool is_armv7_gentimer_present(void)
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{
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return ISOLATE_FIELD(read_id_pfr1(), ID_PFR1_GENTIMER_SHIFT,
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ID_PFR1_GENTIMER_MASK) != 0U;
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}
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/* FEAT_TTCNP: Translation table common not private */
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CREATE_FEATURE_PRESENT(feat_ttcnp, id_mmfr4, ID_MMFR4_CNP_SHIFT,
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ID_MMFR4_CNP_MASK, 1U)
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/* FEAT_AMU: Activity Monitors Extension */
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CREATE_FEATURE_FUNCS(feat_amu, id_pfr0, ID_PFR0_AMU_SHIFT,
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ID_PFR0_AMU_MASK, ID_PFR0_AMU_V1, ENABLE_FEAT_AMU)
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/* Auxiliary counters for FEAT_AMU */
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CREATE_FEATURE_FUNCS(feat_amu_aux, amcfgr, AMCFGR_NCG_SHIFT,
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AMCFGR_NCG_MASK, 1U, ENABLE_AMU_AUXILIARY_COUNTERS)
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/* FEAT_AMUV1P1: AMU Extension v1.1 */
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CREATE_FEATURE_FUNCS(feat_amuv1p1, id_pfr0, ID_PFR0_AMU_SHIFT,
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ID_PFR0_AMU_MASK, ID_PFR0_AMU_V1P1, ENABLE_FEAT_AMUv1p1)
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/* FEAT_TRF: Tracefilter */
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CREATE_FEATURE_FUNCS(feat_trf, id_dfr0, ID_DFR0_TRACEFILT_SHIFT,
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ID_DFR0_TRACEFILT_MASK, 1U, ENABLE_TRF_FOR_NS)
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/* FEAT_SYS_REG_TRACE */
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CREATE_FEATURE_FUNCS(feat_sys_reg_trace, id_dfr0, ID_DFR0_COPTRC_SHIFT,
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ID_DFR0_COPTRC_MASK, 1U, ENABLE_SYS_REG_TRACE_FOR_NS)
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/* FEAT_DIT: Data independent timing */
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CREATE_FEATURE_FUNCS(feat_dit, id_pfr0, ID_PFR0_DIT_SHIFT,
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ID_PFR0_DIT_MASK, 1U, ENABLE_FEAT_DIT)
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/* FEAT_PAN: Privileged access never */
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CREATE_FEATURE_FUNCS(feat_pan, id_mmfr3, ID_MMFR3_PAN_SHIFT,
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ID_MMFR3_PAN_MASK, 1U, ENABLE_FEAT_PAN)
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/* FEAT_SSBS: Speculative store bypass safe */
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CREATE_FEATURE_PRESENT(feat_ssbs, id_pfr2, ID_PFR2_SSBS_SHIFT,
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ID_PFR2_SSBS_MASK, 1U)
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/* FEAT_PMUV3 */
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CREATE_FEATURE_PRESENT(feat_pmuv3, id_dfr0, ID_DFR0_PERFMON_SHIFT,
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ID_DFR0_PERFMON_MASK, 3U)
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/* FEAT_MTPMU */
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__attribute__((always_inline))
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static inline bool is_feat_mtpmu_present(void)
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{
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unsigned int mtpmu = ISOLATE_FIELD(read_id_dfr1(), ID_DFR1_MTPMU_SHIFT,
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ID_DFR1_MTPMU_MASK);
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return (mtpmu != 0U) && (mtpmu != MTPMU_NOT_IMPLEMENTED);
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}
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CREATE_FEATURE_SUPPORTED(feat_mtpmu, is_feat_mtpmu_present, DISABLE_MTPMU)
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/*
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* TWED, ECV, CSV2, RAS are only used by the AArch64 EL2 context switch
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* code. In fact, EL2 context switching is only needed for AArch64 (since
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* there is no secure AArch32 EL2), so just disable these features here.
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*/
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__attribute__((always_inline))
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static inline bool is_feat_twed_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_ecv_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_ecv_v2_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_csv2_2_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_csv2_3_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_ras_supported(void) { return false; }
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/* The following features are supported in AArch64 only. */
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__attribute__((always_inline))
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static inline bool is_feat_vhe_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_sel2_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_fgt_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_tcr2_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_spe_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_rng_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_gcs_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_mte2_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_mpam_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_hcx_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_sve_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_brbe_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_trbe_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_nv2_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_sme_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_sme2_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_s2poe_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_s1poe_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_sxpoe_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_s2pie_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_s1pie_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_sxpie_supported(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_uao_present(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_nmi_present(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_ebep_present(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_sebep_present(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_d128_present(void) { return false; }
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__attribute__((always_inline))
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static inline bool is_feat_ls64_accdata_present(void) { return false; }
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#endif /* ARCH_FEATURES_H */
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