mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-16 17:44:19 +00:00
831b0e9824
And from crash_console_flush. We ignore the error information return by console_flush in _every_ place where we call it, and casting the return type to void does not work around the MISRA violation that this causes. Instead, we collect the error information from the driver (to avoid changing that API), and don't return it to the caller. Change-Id: I1e35afe01764d5c8f0efd04f8949d333ffb688c1 Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
256 lines
6.6 KiB
ArmAsm
256 lines
6.6 KiB
ArmAsm
/*
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* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <platform_def.h>
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#include <arch.h>
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#include <asm_macros.S>
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#include <common/bl_common.h>
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#include <drivers/st/stm32_gpio.h>
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#define GPIO_TX_SHIFT (DEBUG_UART_TX_GPIO_PORT << 1)
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.globl platform_mem_init
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.globl plat_report_exception
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.globl plat_get_my_entrypoint
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.globl plat_secondary_cold_boot_setup
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.globl plat_reset_handler
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.globl plat_is_my_cpu_primary
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.globl plat_my_core_pos
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.globl plat_crash_console_init
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.globl plat_crash_console_flush
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.globl plat_crash_console_putc
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.globl plat_panic_handler
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func platform_mem_init
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/* Nothing to do, don't need to init SYSRAM */
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bx lr
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endfunc platform_mem_init
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func plat_report_exception
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#if DEBUG
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mov r8, lr
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/* Test if an abort occurred */
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cmp r0, #MODE32_abt
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bne undef_inst_lbl
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ldr r4, =abort_str
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bl asm_print_str
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mrs r4, lr_abt
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sub r4, r4, #4
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b print_exception_info
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undef_inst_lbl:
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/* Test for an undefined instruction */
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cmp r0, #MODE32_und
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bne other_exception_lbl
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ldr r4, =undefined_str
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bl asm_print_str
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mrs r4, lr_und
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b print_exception_info
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other_exception_lbl:
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/* Other exceptions */
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mov r9, r0
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ldr r4, =exception_start_str
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bl asm_print_str
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mov r4, r9
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bl asm_print_hex
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ldr r4, =exception_end_str
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bl asm_print_str
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mov r4, r6
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print_exception_info:
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bl asm_print_hex
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ldr r4, =end_error_str
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bl asm_print_str
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bx r8
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#else
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bx lr
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#endif
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endfunc plat_report_exception
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func plat_reset_handler
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bx lr
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endfunc plat_reset_handler
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/* ------------------------------------------------------------------
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* unsigned long plat_get_my_entrypoint (void);
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*
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* Main job of this routine is to distinguish between a cold and warm
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* boot.
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*
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* Currently supports only cold boot
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* ------------------------------------------------------------------
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*/
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func plat_get_my_entrypoint
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mov r0, #0
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bx lr
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endfunc plat_get_my_entrypoint
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/* ---------------------------------------------
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* void plat_secondary_cold_boot_setup (void);
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*
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* Cold-booting secondary CPUs is not supported.
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* ---------------------------------------------
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*/
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func plat_secondary_cold_boot_setup
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b .
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endfunc plat_secondary_cold_boot_setup
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/* -----------------------------------------------------
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* unsigned int plat_is_my_cpu_primary (void);
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*
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* Find out whether the current cpu is the primary cpu.
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* -----------------------------------------------------
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*/
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func plat_is_my_cpu_primary
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ldcopr r0, MPIDR
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ldr r1, =(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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and r0, r1
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cmp r0, #STM32MP_PRIMARY_CPU
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moveq r0, #1
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movne r0, #0
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bx lr
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endfunc plat_is_my_cpu_primary
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/* -------------------------------------------
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* int plat_stm32mp1_get_core_pos(int mpidr);
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*
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* Return CorePos = (ClusterId * 4) + CoreId
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* -------------------------------------------
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*/
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func plat_stm32mp1_get_core_pos
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and r1, r0, #MPIDR_CPU_MASK
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and r0, r0, #MPIDR_CLUSTER_MASK
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add r0, r1, r0, LSR #6
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bx lr
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endfunc plat_stm32mp1_get_core_pos
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/* ------------------------------------
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* unsigned int plat_my_core_pos(void)
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* ------------------------------------
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*/
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func plat_my_core_pos
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ldcopr r0, MPIDR
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b plat_stm32mp1_get_core_pos
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endfunc plat_my_core_pos
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/* ---------------------------------------------
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* int plat_crash_console_init(void)
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*
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* Initialize the crash console without a C Runtime stack.
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* ---------------------------------------------
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*/
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func plat_crash_console_init
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/* Enable GPIOs for UART TX */
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ldr r1, =(RCC_BASE + DEBUG_UART_TX_GPIO_BANK_CLK_REG)
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ldr r2, [r1]
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/* Configure GPIO */
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orr r2, r2, #DEBUG_UART_TX_GPIO_BANK_CLK_EN
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str r2, [r1]
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ldr r1, =DEBUG_UART_TX_GPIO_BANK_ADDRESS
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/* Set GPIO mode alternate */
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ldr r2, [r1, #GPIO_MODE_OFFSET]
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bic r2, r2, #(GPIO_MODE_MASK << GPIO_TX_SHIFT)
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orr r2, r2, #(GPIO_MODE_ALTERNATE << GPIO_TX_SHIFT)
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str r2, [r1, #GPIO_MODE_OFFSET]
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/* Set GPIO speed low */
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ldr r2, [r1, #GPIO_SPEED_OFFSET]
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bic r2, r2, #(GPIO_SPEED_MASK << GPIO_TX_SHIFT)
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str r2, [r1, #GPIO_SPEED_OFFSET]
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/* Set no-pull */
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ldr r2, [r1, #GPIO_PUPD_OFFSET]
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bic r2, r2, #(GPIO_PULL_MASK << GPIO_TX_SHIFT)
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str r2, [r1, #GPIO_PUPD_OFFSET]
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/* Set alternate */
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#if DEBUG_UART_TX_GPIO_PORT >= GPIO_ALT_LOWER_LIMIT
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ldr r2, [r1, #GPIO_AFRH_OFFSET]
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bic r2, r2, #(GPIO_ALTERNATE_MASK << \
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((DEBUG_UART_TX_GPIO_PORT - GPIO_ALT_LOWER_LIMIT) << 2))
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orr r2, r2, #(DEBUG_UART_TX_GPIO_ALTERNATE << \
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((DEBUG_UART_TX_GPIO_PORT - GPIO_ALT_LOWER_LIMIT) << 2))
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str r2, [r1, #GPIO_AFRH_OFFSET]
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#else
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ldr r2, [r1, #GPIO_AFRL_OFFSET]
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bic r2, r2, #(GPIO_ALTERNATE_MASK << (DEBUG_UART_TX_GPIO_PORT << 2))
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orr r2, r2, #(DEBUG_UART_TX_GPIO_ALTERNATE << (DEBUG_UART_TX_GPIO_PORT << 2))
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str r2, [r1, #GPIO_AFRL_OFFSET]
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#endif
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/* Enable UART clock, with its source */
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ldr r1, =(RCC_BASE + DEBUG_UART_TX_CLKSRC_REG)
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mov r2, #DEBUG_UART_TX_CLKSRC
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str r2, [r1]
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ldr r1, =(RCC_BASE + DEBUG_UART_TX_EN_REG)
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ldr r2, [r1]
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orr r2, r2, #DEBUG_UART_TX_EN
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str r2, [r1]
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ldr r0, =STM32MP_DEBUG_USART_BASE
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ldr r1, =STM32MP_DEBUG_USART_CLK_FRQ
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ldr r2, =STM32MP_UART_BAUDRATE
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b console_stm32_core_init
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endfunc plat_crash_console_init
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/* ---------------------------------------------
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* void plat_crash_console_flush(void)
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*
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* Flush the crash console without a C Runtime stack.
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* ---------------------------------------------
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*/
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func plat_crash_console_flush
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ldr r1, =STM32MP_DEBUG_USART_BASE
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b console_stm32_core_flush
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endfunc plat_crash_console_flush
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/* ---------------------------------------------
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* int plat_crash_console_putc(int c)
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*
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* Print a character on the crash console without a C Runtime stack.
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* Clobber list : r1 - r3
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*
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* In case of bootloading through uart, we keep console crash as this.
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* Characters could be sent to the programmer, but will be ignored.
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* No specific code in that case.
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* ---------------------------------------------
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*/
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func plat_crash_console_putc
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ldr r1, =STM32MP_DEBUG_USART_BASE
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b console_stm32_core_putc
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endfunc plat_crash_console_putc
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/* ----------------------------------------------------------
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* void plat_panic_handler(void) __dead2;
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* Report exception + endless loop.
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*
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* r6 holds the address where the fault occurred.
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* Filling lr with this value allows debuggers to reconstruct
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* the backtrace.
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* ----------------------------------------------------------
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*/
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func plat_panic_handler
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mrs r0, cpsr
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and r0, #MODE32_MASK
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bl plat_report_exception
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mov lr, r6
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b .
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endfunc plat_panic_handler
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#if DEBUG
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.section .rodata.rev_err_str, "aS"
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abort_str:
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.asciz "\nAbort at: 0x"
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undefined_str:
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.asciz "\nUndefined instruction at: 0x"
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exception_start_str:
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.asciz "\nException mode=0x"
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exception_end_str:
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.asciz " at: 0x"
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end_error_str:
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.asciz "\n\r"
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#endif
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