mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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82cb2c1ad9
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
112 lines
4 KiB
C
112 lines
4 KiB
C
/*
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* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <arch_helpers.h>
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#include <assert.h>
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#include <bl_common.h>
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#include <console.h>
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#include <platform_def.h>
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#include "qemu_private.h"
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/*******************************************************************************
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* Declarations of linker defined symbols which will tell us where BL1 lives
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* in Trusted RAM
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******************************************************************************/
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extern uint64_t __BL1_RAM_START__;
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extern uint64_t __BL1_RAM_END__;
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#define BL1_RAM_BASE (uint64_t)(&__BL1_RAM_START__)
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#define BL1_RAM_LIMIT (uint64_t)(&__BL1_RAM_END__)
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/* Data structure which holds the extents of the trusted SRAM for BL1*/
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static meminfo_t bl1_tzram_layout;
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meminfo_t *bl1_plat_sec_mem_layout(void)
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{
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return &bl1_tzram_layout;
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}
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/*******************************************************************************
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* Perform any BL1 specific platform actions.
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******************************************************************************/
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void bl1_early_platform_setup(void)
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{
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const size_t bl1_size = BL1_RAM_LIMIT - BL1_RAM_BASE;
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/* Initialize the console to provide early debug support */
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console_init(PLAT_QEMU_BOOT_UART_BASE, PLAT_QEMU_BOOT_UART_CLK_IN_HZ,
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PLAT_QEMU_CONSOLE_BAUDRATE);
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/* Allow BL1 to see the whole Trusted RAM */
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bl1_tzram_layout.total_base = BL_RAM_BASE;
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bl1_tzram_layout.total_size = BL_RAM_SIZE;
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/* Calculate how much RAM BL1 is using and how much remains free */
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bl1_tzram_layout.free_base = BL_RAM_BASE;
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bl1_tzram_layout.free_size = BL_RAM_SIZE;
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reserve_mem(&bl1_tzram_layout.free_base, &bl1_tzram_layout.free_size,
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BL1_RAM_BASE, bl1_size);
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}
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/******************************************************************************
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* Perform the very early platform specific architecture setup. This only
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* does basic initialization. Later architectural setup (bl1_arch_setup())
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* does not do anything platform specific.
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*****************************************************************************/
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void bl1_plat_arch_setup(void)
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{
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qemu_configure_mmu_el3(bl1_tzram_layout.total_base,
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bl1_tzram_layout.total_size,
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BL1_RO_BASE, BL1_RO_LIMIT,
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BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END);
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}
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void bl1_platform_setup(void)
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{
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plat_qemu_io_setup();
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}
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/*******************************************************************************
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* Function that takes a memory layout into which BL2 has been loaded and
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* populates a new memory layout for BL2 that ensures that BL1's data sections
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* resident in secure RAM are not visible to BL2.
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******************************************************************************/
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void bl1_init_bl2_mem_layout(const meminfo_t *bl1_mem_layout,
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meminfo_t *bl2_mem_layout)
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{
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const size_t bl1_size = BL1_RAM_LIMIT - BL1_RAM_BASE;
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assert(bl1_mem_layout != NULL);
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assert(bl2_mem_layout != NULL);
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/* Check that BL1's memory is lying outside of the free memory */
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assert((BL1_RAM_LIMIT <= bl1_mem_layout->free_base) ||
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(BL1_RAM_BASE >= (bl1_mem_layout->free_base +
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bl1_mem_layout->free_size)));
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/* Remove BL1 RW data from the scope of memory visible to BL2 */
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*bl2_mem_layout = *bl1_mem_layout;
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reserve_mem(&bl2_mem_layout->total_base,
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&bl2_mem_layout->total_size,
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BL1_RAM_BASE,
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bl1_size);
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flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t));
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}
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/*******************************************************************************
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* Before calling this function BL2 is loaded in memory and its entrypoint
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* is set by load_image. This is a placeholder for the platform to change
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* the entrypoint of BL2 and set SPSR and security state.
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* On ARM standard platforms we only set the security state of the entrypoint
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******************************************************************************/
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void bl1_plat_set_bl2_ep_info(image_info_t *bl2_image,
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entry_point_info_t *bl2_ep)
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{
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SET_SECURITY_STATE(bl2_ep->h.attr, SECURE);
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bl2_ep->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
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}
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