arm-trusted-firmware/lib/psci
Harrison Mutai aea4ccf8d9 fix(cpus): workaround for Cortex-A510 erratum 2684597
Cortex-A510 erratum 2684597 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3, r1p0, r1p1 and r1p2. It is fixed in r1p3. The
workaround is to execute a TSB CSYNC and DSB before executing WFI for
power down.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1873361/latest
https://developer.arm.com/documentation/SDEN1873351/latest

Change-Id: Ic0b24b600bc013eb59c797401fbdc9bda8058d6d
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
2023-01-25 09:40:33 +00:00
..
aarch32 fix(psci): tighten psci_power_down_wfi behaviour 2023-01-23 17:25:40 +00:00
aarch64 fix(cpus): workaround for Cortex-A510 erratum 2684597 2023-01-25 09:40:33 +00:00
psci_common.c refactor(psci): unify psci_is_last_on_cpu and psci_is_last_on_cpu_safe 2022-09-29 16:37:34 +01:00
psci_lib.mk fix(cpus): workaround for Cortex-A510 erratum 2684597 2023-01-25 09:40:33 +00:00
psci_main.c refactor(psci): unify psci_is_last_on_cpu and psci_is_last_on_cpu_safe 2022-09-29 16:37:34 +01:00
psci_mem_protect.c Sanitise includes across codebase 2019-01-04 10:43:17 +00:00
psci_off.c refactor(psci): move psci_do_pwrdown_sequence() out of private header 2022-09-15 18:09:56 +05:30
psci_on.c refactor(context mgmt): add cm_prepare_el3_exit_ns function 2022-04-12 17:42:11 +02:00
psci_private.h fix(cpus): workaround for Cortex-A510 erratum 2684597 2023-01-25 09:40:33 +00:00
psci_setup.c feat(psci): require validate_power_state to expose CPU_SUSPEND 2021-10-15 14:13:54 +02:00
psci_stat.c Unify type of "cpu_idx" across PSCI module. 2020-01-10 17:11:51 +00:00
psci_suspend.c refactor(psci): move psci_do_pwrdown_sequence() out of private header 2022-09-15 18:09:56 +05:30
psci_system_off.c Don't return error information from console_flush 2020-10-09 10:21:50 -05:00