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Addition of documents for platforms based on NXP SoC LX2160A. Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Change-Id: I39ac5a9eb0b668d26301a0a24a1e6bf87f245f02
232 lines
7.2 KiB
ReStructuredText
232 lines
7.2 KiB
ReStructuredText
NXP SoCs - Overview
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=====================
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.. section-numbering::
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:suffix: .
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The QorIQ family of ARM based SoCs that are supported on TF-A are:
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1. LX2160ARDB:
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Platform Name:
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a. lx2160ardb (Board details can be fetched from the link: `lx2160ardb`_)
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Table of supported boot-modes by each platform & platform that needs FIP-DDR:
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-----------------------------------------------------------------------------
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+---+-----------------+-------+--------+-------+-------+-------+-------------+--------------+-----------------+
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| | BOOT_MODE-->| sd | qspi | nor | nand | emmc | flexspi_nor | flexspi_nand | fip_ddr needed |
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| | | | | | | | | | |
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| | PLAT | | | | | | | | |
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+===+=================+=======+========+=======+=======+=======+=============+==============+=================+
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| 1.| lx2160ardb | yes | | | | yes | yes | | yes |
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+---+-----------------+-------+--------+-------+-------+-------+-------------+--------------+-----------------+
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Boot Sequence
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-------------
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::
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+ Secure World | Normal World
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+ EL0 |
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+ |
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+ EL1 BL32(Tee OS) | kernel
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+ ^ | | ^
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+ | | | |
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+ EL2 | | | BL33(u-boot)
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+ | | | ^
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+ | v | /
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+ EL3 BootROM --> BL2 --> BL31 ---------------/
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+
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Boot Sequence with FIP-DDR
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--------------------------
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::
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+ Secure World | Normal World
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+ EL0 |
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+ |
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+ EL1 fip-ddr BL32(Tee OS) | kernel
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+ ^ | ^ | | ^
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+ | | | | | |
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+ EL2 | | | | | BL33(u-boot)
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+ | | | | | ^
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+ | v | v | /
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+ EL3 BootROM --> BL2 -----> BL31 ---------------/
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+
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How to build
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=============
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Code Locations
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--------------
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- OP-TEE:
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`link <https://source.codeaurora.org/external/qoriq/qoriq-components/optee_os>`__
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- U-Boot:
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`link <https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot>`__
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- RCW:
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`link <https://source.codeaurora.org/external/qoriq/qoriq-components/rcw>`__
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- ddr-phy-binary: Required by platforms that need fip-ddr.
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`link <https:://github.com/NXP/ddr-phy-binary>`__
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- cst: Required for TBBR.
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`link <https:://source.codeaurora.org/external/qoriq/qoriq-components/cst>`__
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Build Procedure
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---------------
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- Fetch all the above repositories into local host.
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- Prepare AARCH64 toolchain and set the environment variable "CROSS_COMPILE".
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.. code:: shell
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export CROSS_COMPILE=.../bin/aarch64-linux-gnu-
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- Build RCW. Refer README from the respective cloned folder for more details.
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- Build u-boot and OPTee firstly, and get binary images: u-boot.bin and tee.bin.
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For u-boot you can use the <platform>_tfa_defconfig for build.
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- Copy/clone the repo "ddr-phy-binary" to the tfa directory for platform needing ddr-fip.
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- Below are the steps to build TF-A images for the supported platforms.
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Compilation steps without BL32
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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BUILD BL2:
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-To compile
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.. code:: shell
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make PLAT=$PLAT \
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BOOT_MODE=<platform_supported_boot_mode> \
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RCW=$RCW_BIN \
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pbl
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BUILD FIP:
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.. code:: shell
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make PLAT=$PLAT \
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BOOT_MODE=<platform_supported_boot_mode> \
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RCW=$RCW_BIN \
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BL33=$UBOOT_SECURE_BIN \
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pbl \
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fip
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Compilation steps with BL32
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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BUILD BL2:
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-To compile
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.. code:: shell
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make PLAT=$PLAT \
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BOOT_MODE=<platform_supported_boot_mode> \
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RCW=$RCW_BIN \
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BL32=$TEE_BIN SPD=opteed\
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pbl
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BUILD FIP:
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.. code:: shell
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make PLAT=$PLAT \
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BOOT_MODE=<platform_supported_boot_mode> \
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RCW=$RCW_BIN \
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BL32=$TEE_BIN SPD=opteed\
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BL33=$UBOOT_SECURE_BIN \
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pbl \
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fip
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BUILD fip-ddr (Mandatory for certain platforms, refer table above):
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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-To compile additional fip-ddr for selected platforms(Refer above table if the platform needs fip-ddr).
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.. code:: shell
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make PLAT=<platform_name> fip-ddr
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Deploy ATF Images
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=================
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Note: The size in the standard uboot commands for copy to nor, qspi, nand or sd
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should be modified based on the binary size of the image to be copied.
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- Deploy ATF images on flexspi-Nor flash Alt Bank from U-Boot prompt.
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-- Commands to flash images for bl2_xxx.pbl and fip.bin.
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.. code:: shell
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tftp 82000000 $path/bl2_flexspi_nor.pbl;
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i2c mw 66 50 20;sf probe 0:0; sf erase 0 +$filesize; sf write 0x82000000 0x0 $filesize;
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tftp 82000000 $path/fip.bin;
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i2c mw 66 50 20;sf probe 0:0; sf erase 0x100000 +$filesize; sf write 0x82000000 0x100000 $filesize;
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-- Next step is valid for platform where FIP-DDR is needed.
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.. code:: shell
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tftp 82000000 $path/ddr_fip.bin;
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i2c mw 66 50 20;sf probe 0:0; sf erase 0x800000 +$filesize; sf write 0x82000000 0x800000 $filesize;
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-- Then reset to alternate bank to boot up ATF.
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.. code:: shell
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qixisreset altbank;
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- Deploy ATF images on SD/eMMC from U-Boot prompt.
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-- file_size_in_block_sizeof_512 = (Size_of_bytes_tftp / 512)
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.. code:: shell
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mmc dev <idx>; (idx = 1 for eMMC; idx = 0 for SD)
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tftp 82000000 $path/bl2_<sd>_or_<emmc>.pbl;
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mmc write 82000000 8 <file_size_in_block_sizeof_512>;
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tftp 82000000 $path/fip.bin;
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mmc write 82000000 0x800 <file_size_in_block_sizeof_512>;
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-- Next step is valid for platform that needs FIP-DDR.
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.. code:: shell
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tftp 82000000 $path/ddr_fip.bin;
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mmc write 82000000 0x4000 <file_size_in_block_sizeof_512>;
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-- Then reset to sd/emmc to boot up ATF from sd/emmc as boot-source.
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.. code:: shell
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qixisreset <sd or emmc>;
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Trusted Board Boot:
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===================
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For TBBR, the binary name changes:
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+-------------+--------------------------+---------+-------------------+
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| Boot Type | BL2 | FIP | FIP-DDR |
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+=============+==========================+=========+===================+
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| Normal Boot | bl2_<boot_mode>.pbl | fip.bin | ddr_fip.bin |
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+-------------+--------------------------+---------+-------------------+
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| TBBR Boot | bl2_<boot_mode>_sec.pbl | fip.bin | ddr_fip_sec.bin |
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+-------------+--------------------------+---------+-------------------+
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Refer `nxp-ls-tbbr.rst`_ for detailed user steps.
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.. _lx2160ardb: https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-communication-process/layerscape-lx2160a-multicore-communications-processor:LX2160A
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.. _nxp-ls-tbbr.rst: ./nxp-ls-tbbr.rst
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