Raghu Krishnamurthy 7c2fe62f13 fix(bl31): allow use of EHF with S-EL2 SPMC ... Currently, when SPMC at S-EL2 is used, we cannot use the RAS framework to handle Group 0 interrupts. This is required on platforms where first level of triaging needs to occur at EL3, before forwarding RAS handling to a secure partition running atop an SPMC (hafnium). The RAS framework depends on EHF and EHF registers for Group 0 interrupts to be trapped to EL3 when execution is both in secure world and normal world. However, an FF-A compliant SPMC requires secure interrupts to be trapped by the SPMC when execution is in S-EL0/S-EL1. Consequently, the SPMC (hafnium) is incompatible with EHF, since it is not re-entrant, and a Group 0 interrupt trapped to EL3 when execution is in secure world, cannot be forwarded to an SP running atop SPMC. This patch changes EHF to only register for Group 0 interrupts to be trapped to EL3 when execution is in normal world and also makes it a valid routing model to do so, when EL3_EXCEPTION_HANDLING is set (when enabling the RAS framework). Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com> Change-Id: I72d4cf4d8ecc549a832d1c36055fbe95866747fe		2022-08-30 08:29:25 -07:00
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aarch64	fix(bl31): pass the EA bit to 'delegate_sync_ea'	2022-08-03 12:01:36 +01:00
bl31.ld.S	fix(build): discard sections also with SEPARATE_NOBITS_REGION	2022-08-10 20:23:12 -05:00
bl31.mk	feat(brbe): add BRBE support for NS world	2022-05-05 19:43:10 +02:00
bl31_context_mgmt.c	feat(rme): add context management changes for FEAT_RME	2021-10-05 18:41:35 +02:00
bl31_main.c	refactor(context mgmt): add cm_prepare_el3_exit_ns function	2022-04-12 17:42:11 +02:00
ehf.c	fix(bl31): allow use of EHF with S-EL2 SPMC	2022-08-30 08:29:25 -07:00
interrupt_mgmt.c	Use correct type when reading SCR register	2020-01-28 11:10:48 +00:00