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1cf55aba49
This adds BL31 support to Intel Stratix10 SoCFPGA platform. BL31 in TF-A supports: - PSCI calls to enable 4 CPU cores - PSCI mailbox calls for FPGA reconfiguration Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
22 lines
516 B
ArmAsm
22 lines
516 B
ArmAsm
/*
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* Copyright (c) 2019, Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __PLAT_MACROS_S__
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#define __PLAT_MACROS_S__
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#include <platform_def.h>
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/* ---------------------------------------------
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* The below required platform porting macro
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* prints out relevant platform registers
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* whenever an unhandled exception is taken in
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* BL31.
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* ---------------------------------------------
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*/
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.macro plat_crash_print_regs
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.endm
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#endif /* __PLAT_MACROS_S__ */
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