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On versal2 platform, unlike current static DT address passing mechanism, DT address is retrieved from transfer list dynamically. Change-Id: I44b9a0753809652f26bc1b7e061f5364229ba352 Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
72 lines
1.3 KiB
C
72 lines
1.3 KiB
C
/*
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* Copyright (c) 2025, Advanced Micro Devices, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/debug.h>
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#include <common/fdt_fixup.h>
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#include <common/fdt_wrappers.h>
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#include <libfdt.h>
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#include <platform_def.h>
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#include <plat_fdt.h>
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#include <plat_xfer_list.h>
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#define FIT_CONFS_PATH "/configurations"
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static bool is_fit_image(void *dtb)
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{
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int64_t confs_noffset = 0;
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bool status = true;
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confs_noffset = fdt_path_offset(dtb, FIT_CONFS_PATH);
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/* confs_noffset is only present on FIT image */
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if (confs_noffset < 0) {
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status = false;
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}
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return status;
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}
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int32_t is_valid_dtb(void *fdt)
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{
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int32_t ret = 0;
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ret = fdt_check_header(fdt);
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if (ret != 0) {
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ERROR("Can't read DT at %p\n", fdt);
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goto error;
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}
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ret = fdt_open_into(fdt, fdt, XILINX_OF_BOARD_DTB_MAX_SIZE);
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if (ret < 0) {
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ERROR("Invalid Device Tree at %p: error %d\n", fdt, ret);
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goto error;
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}
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if (is_fit_image(fdt)) {
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WARN("FIT image detected, TF-A will not update DTB for DDR address space\n");
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ret = -FDT_ERR_NOTFOUND;
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}
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error:
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return ret;
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}
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/* TODO: Reserve TFA memory in DT through custom TL entry */
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void prepare_dtb(void)
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{
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}
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uintptr_t plat_retrieve_dt_addr(void)
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{
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void *dtb = NULL;
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dtb = transfer_list_retrieve_dt_address();
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if (dtb == NULL) {
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WARN("TL header or DT entry is invalid\n");
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}
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return (uintptr_t)dtb;
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}
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