arm-trusted-firmware/plat/amd/common/plat_fdt.c
Maheedhar Bollapalli ea453871ef feat(versal2): retrieve DT address from transfer list
On versal2 platform, unlike current static DT address passing
mechanism, DT address is retrieved from transfer list dynamically.

Change-Id: I44b9a0753809652f26bc1b7e061f5364229ba352
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
2025-02-17 06:11:10 +00:00

72 lines
1.3 KiB
C

/*
* Copyright (c) 2025, Advanced Micro Devices, Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <common/debug.h>
#include <common/fdt_fixup.h>
#include <common/fdt_wrappers.h>
#include <libfdt.h>
#include <platform_def.h>
#include <plat_fdt.h>
#include <plat_xfer_list.h>
#define FIT_CONFS_PATH "/configurations"
static bool is_fit_image(void *dtb)
{
int64_t confs_noffset = 0;
bool status = true;
confs_noffset = fdt_path_offset(dtb, FIT_CONFS_PATH);
/* confs_noffset is only present on FIT image */
if (confs_noffset < 0) {
status = false;
}
return status;
}
int32_t is_valid_dtb(void *fdt)
{
int32_t ret = 0;
ret = fdt_check_header(fdt);
if (ret != 0) {
ERROR("Can't read DT at %p\n", fdt);
goto error;
}
ret = fdt_open_into(fdt, fdt, XILINX_OF_BOARD_DTB_MAX_SIZE);
if (ret < 0) {
ERROR("Invalid Device Tree at %p: error %d\n", fdt, ret);
goto error;
}
if (is_fit_image(fdt)) {
WARN("FIT image detected, TF-A will not update DTB for DDR address space\n");
ret = -FDT_ERR_NOTFOUND;
}
error:
return ret;
}
/* TODO: Reserve TFA memory in DT through custom TL entry */
void prepare_dtb(void)
{
}
uintptr_t plat_retrieve_dt_addr(void)
{
void *dtb = NULL;
dtb = transfer_list_retrieve_dt_address();
if (dtb == NULL) {
WARN("TL header or DT entry is invalid\n");
}
return (uintptr_t)dtb;
}