Boyan Karatotev 7954412694 fix(cpus): workaround for Cortex-X3 erratum 2313909 ... Cortex-X3 erratum 2313909 is a Cat B erratum that applies to revisions r0p0 and r1p0, and is fixed in r1p1. The workaround is to set CPUACTLR2_EL1[36] to 1 before the power down sequence that sets CORE_PWRDN_EN. This allows the cpu to retry the power down and prevents the deadlock. TF-A never clears this bit even if it wakes up from the wfi in the sequence since it is not expected to do anything but retry to power down after and the bit is cleared on reset. SDEN can be found here: https://developer.arm.com/documentation/SDEN2055130/latest Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I5935b4bcd1e6712477c0d6eab2acc96d7964a35d		2022-10-27 13:46:52 +01:00
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aarch32	Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__	2019-08-01 13:14:12 -07:00
aarch64	fix(cpus): workaround for Cortex-X3 erratum 2313909	2022-10-27 13:46:52 +01:00
errata_report.h	Workaround for Cortex A78 erratum 1951500	2021-01-13 13:54:18 -06:00
wa_cve_2017_5715.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00
wa_cve_2018_3639.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00
wa_cve_2022_23960.h	fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57	2022-03-18 01:01:34 +02:00