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https://github.com/ARM-software/arm-trusted-firmware.git
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ade92a64e4
On receiving CPU power down callback, TF-A raises SGI interrupt to all active cores to power down each active cores. Add handler for this SGI IRQ. By default TF-A uses SGI 6 for CPU power down request. This can be configurable through CPU_PWRDWN_SGI build flag. e.g., If user wants to use SGI 7 instead of SGI 6 then provide build flag CPU_PWRDWN_SGI=7 Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Change-Id: Id0df32187d1de3f0af4486eb4d4930cb3ab01dbd
55 lines
1.9 KiB
ReStructuredText
55 lines
1.9 KiB
ReStructuredText
Xilinx Versal NET
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=================
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Trusted Firmware-A implements the EL3 firmware layer for Xilinx Versal NET.
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The platform only uses the runtime part of TF-A as Xilinx Versal NET already
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has a BootROM (BL1) and PMC FW (BL2).
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BL31 is TF-A.
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BL32 is an optional Secure Payload.
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BL33 is the non-secure world software (U-Boot, Linux etc).
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To build:
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```bash
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make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal_net bl31
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```
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To build bl32 TSP you have to rebuild bl31 too
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```bash
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make CROSS_COMPILE=aarch64-none-elf- PLAT=versal_net SPD=tspd RESET_TO_BL31=1 bl31 bl32
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```
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To build TF-A for JTAG DCC console:
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```bash
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make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal_net VERSAL_NET_CONSOLE=dcc bl31
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```
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Xilinx Versal NET platform specific build options
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-------------------------------------------------
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* `VERSAL_NET_ATF_MEM_BASE`: Specifies the base address of the bl31 binary.
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* `VERSAL_NET_ATF_MEM_SIZE`: Specifies the size of the memory region of the bl31 binary.
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* `VERSAL_NET_BL32_MEM_BASE`: Specifies the base address of the bl32 binary.
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* `VERSAL_NET_BL32_MEM_SIZE`: Specifies the size of the memory region of the bl32 binary.
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* `VERSAL_NET_CONSOLE`: Select the console driver. Options:
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- `pl011`, `pl011_0`: ARM pl011 UART 0 (default)
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- `pl011_1` : ARM pl011 UART 1
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- `dcc` : JTAG Debug Communication Channel(DCC)
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* `TFA_NO_PM` : Platform Management support.
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- 0 : Enable Platform Management (Default)
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- 1 : Disable Platform Management
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* `CPU_PWRDWN_SGI`: Select the SGI for triggering CPU power down request to
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secondary cores on receiving power down callback from
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firmware. Options:
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- `0` : SGI 0
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- `1` : SGI 1
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- `2` : SGI 2
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- `3` : SGI 3
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- `4` : SGI 4
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- `5` : SGI 5
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- `6` : SGI 6 (Default)
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- `7` : SGI 7
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