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https://github.com/ARM-software/arm-trusted-firmware.git
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78aac78ad2
The Qualcomm X5 Modem (MDM9607) SoC is very similar to the existing MSM8916, except for: - Single core ARM Cortex-A7 - No GPU - MMU-500 r2p4 instead of r0p0 (need to clear CACHE_LOCK bit) - Different default BL31/BL33 address and UART number Make the existing MSM8916 platform port usable for MDM9607 as well by adding some minimal if statements where necessary plus the platform make files for mdm9607. Change-Id: I4dd02c8e29af6282d8d828c3027c5e333459ba36 Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
122 lines
3.4 KiB
C
122 lines
3.4 KiB
C
/*
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* Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net>
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <common/bl_common.h>
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#include <drivers/console.h>
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#include <drivers/generic_delay_timer.h>
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#include <lib/mmio.h>
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#include <lib/xlat_tables/xlat_mmu_helpers.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include "msm8916_gicv2.h"
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#include <msm8916_mmap.h>
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#include "msm8916_setup.h"
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#include <uartdm_console.h>
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static const mmap_region_t msm8916_mmap[] = {
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MAP_REGION_FLAT(PCNOC_BASE, PCNOC_SIZE,
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MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER),
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MAP_REGION_FLAT(APCS_BASE, APCS_SIZE,
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MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER),
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{},
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};
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static console_t console;
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unsigned int plat_get_syscnt_freq2(void)
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{
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return PLAT_SYSCNT_FREQ;
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}
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#define GPIO_CFG_FUNC(n) ((n) << 2)
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#define GPIO_CFG_DRV_STRENGTH_MA(ma) (((ma) / 2 - 1) << 6)
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#define CLK_ENABLE BIT_32(0)
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#define CLK_OFF BIT_32(31)
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#define GCC_BLSP1_AHB_CBCR (GCC_BASE + 0x01008)
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#define GCC_BLSP1_UART_APPS_CBCR(n) (GCC_BASE + \
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(((n) == 2) ? (0x0302c) : (0x0203c + (((n) - 1) * 0x1000))))
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#define GCC_APCS_CLOCK_BRANCH_ENA_VOTE (GCC_BASE + 0x45004)
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#define BLSP1_AHB_CLK_ENA BIT_32(10)
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struct uartdm_gpios {
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unsigned int tx, rx, func;
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};
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static const struct uartdm_gpios uartdm_gpio_map[] = {
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#if defined(PLAT_msm8909)
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{4, 5, 0x2}, {20, 21, 0x3},
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#elif defined(PLAT_msm8916) || defined(PLAT_msm8939)
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{0, 1, 0x2}, {4, 5, 0x2},
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#elif defined(PLAT_mdm9607)
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{12, 13, 0x2}, {4, 5, 0x2}, {0, 1, 0x1},
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{16, 17, 0x2}, {8, 9, 0x2}, {20, 21, 0x2},
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#endif
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};
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/*
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* The previous boot stage seems to disable most of the UART setup before exit
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* so it must be enabled here again before the UART console can be used.
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*/
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static void msm8916_enable_blsp_uart(void)
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{
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const struct uartdm_gpios *gpios = &uartdm_gpio_map[QTI_UART_NUM - 1];
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CASSERT(QTI_UART_NUM > 0 && QTI_UART_NUM <= ARRAY_SIZE(uartdm_gpio_map),
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assert_qti_blsp_uart_valid);
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/* Route GPIOs to BLSP UART */
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mmio_write_32(TLMM_GPIO_CFG(gpios->tx), GPIO_CFG_FUNC(gpios->func) |
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GPIO_CFG_DRV_STRENGTH_MA(8));
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mmio_write_32(TLMM_GPIO_CFG(gpios->rx), GPIO_CFG_FUNC(gpios->func) |
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GPIO_CFG_DRV_STRENGTH_MA(8));
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/* Enable AHB clock */
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mmio_setbits_32(GCC_APCS_CLOCK_BRANCH_ENA_VOTE, BLSP1_AHB_CLK_ENA);
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while (mmio_read_32(GCC_BLSP1_AHB_CBCR) & CLK_OFF) {
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}
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/* Enable BLSP UART clock */
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mmio_setbits_32(GCC_BLSP1_UART_APPS_CBCR(QTI_UART_NUM), CLK_ENABLE);
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while (mmio_read_32(GCC_BLSP1_UART_APPS_CBCR(QTI_UART_NUM)) & CLK_OFF) {
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}
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}
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void msm8916_early_platform_setup(void)
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{
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/* Initialize the debug console as early as possible */
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msm8916_enable_blsp_uart();
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console_uartdm_register(&console, BLSP_UART_BASE);
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if (QTI_RUNTIME_UART) {
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/* Mark UART as runtime usable */
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console_set_scope(&console, CONSOLE_FLAG_BOOT |
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CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_CRASH);
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}
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}
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void msm8916_plat_arch_setup(uintptr_t base, size_t size)
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{
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mmap_add_region(base, base, size, MT_RW_DATA | MT_SECURE);
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mmap_add_region(BL_CODE_BASE, BL_CODE_BASE,
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BL_CODE_END - BL_CODE_BASE,
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MT_CODE | MT_SECURE);
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mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE,
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BL_RO_DATA_END - BL_RO_DATA_BASE,
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MT_RO_DATA | MT_SECURE);
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mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE,
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BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
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MT_DEVICE | MT_RW | MT_SECURE | MT_EXECUTE_NEVER);
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mmap_add(msm8916_mmap);
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init_xlat_tables();
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}
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void msm8916_platform_setup(void)
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{
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generic_delay_timer_init();
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msm8916_gicv2_init();
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}
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