arm-trusted-firmware/lib/cpus/aarch64
Govindraj Raja 77feb745e4 fix(cpus): workaround for Cortex-X3 erratum 3701769
Cortex-X3 erratum 3701769 that applies to r0p0, r1p0, r1p1 and r1p2
is still Open.

The workaround is for EL3 software that performs context save/restore
on a change of Security state to use a value of SCR_EL3.NS when
accessing ICH_VMCR_EL2 that reflects the Security state that owns the
data being saved or restored.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-2055130/latest/

Change-Id: Ifd722e1bb8616ada2ad158297a7ca80b19a3370b
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
2025-02-03 13:57:50 -06:00
..
a64fx.S
aem_generic.S
cortex_a35.S
cortex_a53.S
cortex_a55.S
cortex_a57.S
cortex_a65.S
cortex_a65ae.S
cortex_a72.S
cortex_a73.S
cortex_a75.S
cortex_a75_pubsub.c
cortex_a76.S
cortex_a76ae.S
cortex_a77.S
cortex_a78.S
cortex_a78_ae.S
cortex_a78c.S
cortex_a510.S
cortex_a520.S
cortex_a710.S
cortex_a715.S
cortex_a720.S
cortex_a720_ae.S
cortex_a725.S
cortex_alto.S
cortex_arcadia.S
cortex_gelas.S
cortex_x1.S
cortex_x2.S
cortex_x3.S fix(cpus): workaround for Cortex-X3 erratum 3701769 2025-02-03 13:57:50 -06:00
cortex_x4.S
cortex_x925.S
cpu_helpers.S
cpuamu.c
cpuamu_helpers.S
denver.S
dsu_helpers.S
generic.S
neoverse_e1.S
neoverse_n1.S
neoverse_n1_pubsub.c
neoverse_n2.S
neoverse_n3.S
neoverse_n_common.S
neoverse_v1.S
neoverse_v2.S
neoverse_v3.S
nevis.S
qemu_max.S
rainier.S
travis.S
wa_cve_2017_5715_bpiall.S
wa_cve_2017_5715_mmu.S
wa_cve_2022_23960_bhb.S
wa_cve_2022_23960_bhb_vector.S