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Add Centralized Power Control (CPC) module to manage CPU power states. Signed-off-by: Kai Liang <kai.liang@mediatek.com> Change-Id: I212155143018141c89427032f6a7d21243e750b7
48 lines
1.3 KiB
C
48 lines
1.3 KiB
C
/*
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* Copyright (c) 2025, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef MT_SMP_H
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#define MT_SMP_H
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#include <lib/mmio.h>
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#include <platform_def.h>
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#include "mt_cpu_pm.h"
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#define CPUSYS_PPU_CLK_EN_CTRL BIT(12)
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#define CPUSYS_PPU_ISO_CTRL BIT(13)
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#define AA64NAA32_FLAG_START_BIT 16
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#define SMP_CORE_TIMEOUT_MAX (50000)
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#define DO_SMP_CORE_ON_WAIT_TIMEOUT(cpu_id, k_cnt) ({ \
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if (k_cnt >= SMP_CORE_TIMEOUT_MAX) { \
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INFO("[%s:%d] - CORE%d ON WAIT TIMEOUT %u us (> %u)\n", \
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__func__, __LINE__, cpu_id, k_cnt, SMP_CORE_TIMEOUT_MAX); \
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panic(); \
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} \
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k_cnt++; udelay(1); })
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#ifdef CPU_PM_CORE_ARCH64_ONLY
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#define mt_smp_core_init_arch(_a, _b, _c, _d)
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#else
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void mt_smp_core_init_arch(int cluster, int cpu, int arm64,
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struct cpu_pwr_ctrl *pwr_ctrl);
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#endif /* CPU_PM_CORE_ARCH64_ONLY */
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void mt_smp_core_bootup_address_set(int cluster,
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int cpu,
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struct cpu_pwr_ctrl *pwr_ctrl,
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uintptr_t entry);
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int mt_smp_power_core_on(unsigned int cpu_id, struct cpu_pwr_ctrl *pwr_ctrl);
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int mt_smp_power_core_off(unsigned int cpu_id, struct cpu_pwr_ctrl *pwr_ctrl);
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void mt_smp_init(void);
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int mt_smp_cluster_pwpr_init(struct cluster_pwr_ctrl *pwr_ctrl);
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int mt_smp_cluster_pwpr_op_init(struct cluster_pwr_ctrl *pwr_ctrl);
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#endif /* MT_SMP_H */
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