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https://github.com/ARM-software/arm-trusted-firmware.git
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75530ee280
Add Centralized Power Control (CPC) module to manage CPU power states. Signed-off-by: Kai Liang <kai.liang@mediatek.com> Change-Id: I212155143018141c89427032f6a7d21243e750b7
94 lines
2.2 KiB
C
94 lines
2.2 KiB
C
/*
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* Copyright (c) 2025, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include "mt_ppu.h"
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#define MTK_PPU_PWR_DYNAMIC_POLICY_SET(_ctrl, _policy) \
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mmio_clrsetbits_32(_ctrl->ppu_pwpr, \
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PPU_PWPR_MASK, \
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PPU_PWPR_DYNAMIC_MODE | ((_policy) & PPU_PWPR_MASK))
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#define MTK_PPU_PWR_STATIC_POLICY_SET(_ctrl, _policy) \
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mmio_clrsetbits_32(_ctrl->ppu_pwpr, \
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PPU_PWPR_MASK | PPU_PWPR_DYNAMIC_MODE, \
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((_policy) & PPU_PWPR_MASK))
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void mt_smp_ppu_pwr_dynamic_set(struct ppu_pwr_ctrl *ctrl,
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unsigned int policy)
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{
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CPU_PM_ASSERT(ctrl);
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MTK_PPU_PWR_DYNAMIC_POLICY_SET(ctrl, policy);
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dmbsy();
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}
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void mt_smp_ppu_pwr_static_set(struct ppu_pwr_ctrl *ctrl,
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unsigned int policy)
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{
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CPU_PM_ASSERT(ctrl);
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MTK_PPU_PWR_STATIC_POLICY_SET(ctrl, policy);
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dmbsy();
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}
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void mt_smp_ppu_pwr_set(struct ppu_pwr_ctrl *ctrl,
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unsigned int mode,
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unsigned int policy)
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{
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CPU_PM_ASSERT(ctrl);
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if (mode & PPU_PWPR_DYNAMIC_MODE)
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MTK_PPU_PWR_DYNAMIC_POLICY_SET(ctrl, policy);
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else
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MTK_PPU_PWR_STATIC_POLICY_SET(ctrl, policy);
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mmio_write_32(ctrl->ppu_dcdr0, MT_PPU_DCDR0);
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mmio_write_32(ctrl->ppu_dcdr1, MT_PPU_DCDR1);
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dsbsy();
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}
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void mt_smp_ppu_op_set(struct ppu_pwr_ctrl *ctrl,
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unsigned int mode,
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unsigned int policy)
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{
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unsigned int val;
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CPU_PM_ASSERT(ctrl);
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val = mmio_read_32(ctrl->ppu_pwpr);
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val &= ~(PPU_PWPR_OP_MASK | PPU_PWPR_OP_DYNAMIC_MODE);
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val |= PPU_PWPR_OP_MODE(policy);
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if (mode & PPU_PWPR_OP_DYNAMIC_MODE)
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val |= PPU_PWPR_OP_DYNAMIC_MODE;
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mmio_write_32(ctrl->ppu_pwpr, val);
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dsbsy();
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}
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void mt_smp_ppu_set(struct ppu_pwr_ctrl *ctrl,
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unsigned int op_mode,
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unsigned int policy,
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unsigned int pwr_mode,
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unsigned int pwr_policy)
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{
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unsigned int val;
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CPU_PM_ASSERT(ctrl);
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val = mmio_read_32(ctrl->ppu_pwpr);
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if (op_mode & PPU_PWPR_OP_DYNAMIC_MODE)
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val |= (PPU_PWPR_OP_DYNAMIC_MODE |
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PPU_PWPR_OP_MODE(policy));
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else
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val |= PPU_PWPR_OP_MODE(policy);
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if (pwr_mode & PPU_PWPR_DYNAMIC_MODE) {
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val &= ~(PPU_PWPR_MASK);
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val |= (PPU_PWPR_DYNAMIC_MODE | (pwr_policy & PPU_PWPR_MASK));
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} else {
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val &= ~(PPU_PWPR_MASK | PPU_PWPR_DYNAMIC_MODE);
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val |= (pwr_policy & PPU_PWPR_MASK);
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}
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mmio_write_32(ctrl->ppu_pwpr, val);
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dsbsy();
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}
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