arm-trusted-firmware/lib
levi.yun 7475815f4b feat(handoff): fix register convention r1/x1 value on transfer list
According to recently firmware handsoff spec [1]'s "Register usage at handoff
boundary", Transfer List's signature value was changed from 0x40_b10b
(3 bytes) to 4a0f_b10b (4 bytes).

As updating of TL's signature, register value of x1/r1 should be:

In aarch32's r1 value should be
    R1[23:0]: set to the TL signature (4a0f_b10b -> masked range value: 0f_b10b)
    R1[31:24]: version of the register convention ==  1
and
In aarch64's x1 value should be
    X1[31:0]: set to the TL signature (4a0f_b10b)
    X1[39:32]: version of the register convention ==  1
    X1[63:40]: MBZ
(See the [2] and [3]).

Therefore, it requires to separate mask and shift value for register
convention version field when sets each r1/x1.

This patch fix two problems:
   1. breaking X1 value with updated specification in aarch64
        - change of length of signature field.

   2. previous error value set in R1 in arm32.
        - length of signature should be 24, but it uses 32bit signature.

This change is breaking change. It requires some patch for other
softwares (u-boot[4], optee[5]).

Link: https://github.com/FirmwareHandoff/firmware_handoff [1]
Link: https://github.com/FirmwareHandoff/firmware_handoff/issues/32 [2]
Link: 5aa7aa1d3a [3]
Link: https://lists.denx.de/pipermail/u-boot/2024-July/558628.html [4]
Link: https://github.com/OP-TEE/optee_os/pull/6933 [5]
Signed-off-by: Levi Yun <yeoreum.yun@arm.com>
Change-Id: Ie417e054a7a4c192024a2679419e99efeded1705
2024-07-22 15:54:44 +01:00
..
aarch32 chore: update to use Arm word across TF-A 2023-08-08 15:12:30 +01:00
aarch64 feat(gpt): add support for large GPT mappings 2024-05-14 10:36:42 +02:00
bl_aux_params chore: update to use Arm word across TF-A 2023-08-08 15:12:30 +01:00
compiler-rt chore(compiler-rt): update compiler-rt source files 2024-05-10 11:24:49 +02:00
coreboot chore: update to use Arm word across TF-A 2023-08-08 15:12:30 +01:00
cpus feat(rockchip): add RK3566/RK3568 Socs support 2024-06-07 11:59:46 +02:00
debugfs chore: update to use Arm word across TF-A 2023-08-08 15:12:30 +01:00
el3_runtime Merge "feat(cm): context switch MDCR_EL3 register" into integration 2024-06-27 23:18:27 +02:00
extensions feat(cm): context switch MDCR_EL3 register 2024-06-25 13:50:32 +01:00
fconf feat(fconf): support signing-key in root cert node 2024-01-18 13:18:09 -06:00
gpt_rme fix(gpt): fix GPT library fill_l1_tbl() function 2024-06-20 10:29:58 +01:00
libc fix(libc): memset inclusion to libc makefiles 2024-02-02 09:49:01 +01:00
libfdt build(libfdt): introduce include guards 2024-05-10 11:58:45 +00:00
locks feat(locks): add bitlock 2024-04-15 12:14:16 +01:00
mpmm fix(errata): workaround for Cortex-A510 erratum 2250311 2022-02-24 23:30:41 +02:00
optee chore: update to use Arm word across TF-A 2023-08-08 15:12:30 +01:00
pmf feat((smccc): add version FID for PMF 2024-05-06 09:42:11 -05:00
psa feat(psa): introduce generic library for CCA attestation 2024-06-07 11:40:08 +01:00
psci fix(psci): fix parent_idx in psci_validate_state_coordination 2024-05-08 10:09:07 +01:00
romlib build: unify verbosity handling 2024-06-14 15:54:48 +00:00
semihosting chore: update to use Arm word across TF-A 2023-08-08 15:12:30 +01:00
stack_protector chore: update to use Arm word across TF-A 2023-08-08 15:12:30 +01:00
transfer_list feat(handoff): fix register convention r1/x1 value on transfer list 2024-07-22 15:54:44 +01:00
utils chore: update to use Arm word across TF-A 2023-08-08 15:12:30 +01:00
xlat_mpu refactor(cpufeat): add macro to simplify is_feat_xx_present 2024-05-02 12:16:16 -05:00
xlat_tables refactor(cpufeat): add macro to simplify is_feat_xx_present 2024-05-02 12:16:16 -05:00
xlat_tables_v2 refactor(cpufeat): add macro to simplify is_feat_xx_present 2024-05-02 12:16:16 -05:00
zlib chore(zlib): update zlib to version 1.3 2023-11-06 21:13:38 +00:00