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6437a09a2d
At the moment we only support FEAT_SPE to be either unconditionally compiled in, or to be not supported at all. Add support for runtime detection (ENABLE_SPE_FOR_NS=2), by splitting is_armv8_2_feat_spe_present() into an ID register reading function and a second function to report the support status. That function considers both build time settings and runtime information (if needed), and is used before we access SPE related registers. Previously SPE was enabled unconditionally for all platforms, change this now to the runtime detection version. Change-Id: I830c094107ce6a398bf1f4aef7ffcb79d4f36552 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
85 lines
1.8 KiB
C
85 lines
1.8 KiB
C
/*
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* Copyright (c) 2017-2022, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdbool.h>
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#include <arch.h>
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#include <arch_features.h>
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#include <arch_helpers.h>
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#include <lib/el3_runtime/pubsub.h>
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#include <lib/extensions/spe.h>
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static inline void psb_csync(void)
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{
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/*
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* The assembler does not yet understand the psb csync mnemonic
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* so use the equivalent hint instruction.
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*/
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__asm__ volatile("hint #17");
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}
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void spe_enable(bool el2_unused)
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{
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uint64_t v;
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if (el2_unused) {
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/*
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* MDCR_EL2.TPMS (ARM v8.2): Do not trap statistical
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* profiling controls to EL2.
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*
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* MDCR_EL2.E2PB (ARM v8.2): SPE enabled in Non-secure
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* state. Accesses to profiling buffer controls at
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* Non-secure EL1 are not trapped to EL2.
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*/
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v = read_mdcr_el2();
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v &= ~MDCR_EL2_TPMS;
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v |= MDCR_EL2_E2PB(MDCR_EL2_E2PB_EL1);
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write_mdcr_el2(v);
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}
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/*
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* MDCR_EL2.NSPB (ARM v8.2): SPE enabled in Non-secure state
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* and disabled in secure state. Accesses to SPE registers at
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* S-EL1 generate trap exceptions to EL3.
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*
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* MDCR_EL3.EnPMSN (ARM v8.7): Do not trap access to PMSNEVFR_EL1
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* register at NS-EL1 or NS-EL2 to EL3 if FEAT_SPEv1p2 is implemented.
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* Setting this bit to 1 doesn't have any effect on it when
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* FEAT_SPEv1p2 not implemented.
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*/
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v = read_mdcr_el3();
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v |= MDCR_NSPB(MDCR_NSPB_EL1) | MDCR_EnPMSN_BIT;
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write_mdcr_el3(v);
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}
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void spe_disable(void)
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{
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uint64_t v;
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/* Drain buffered data */
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psb_csync();
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dsbnsh();
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/* Disable profiling buffer */
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v = read_pmblimitr_el1();
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v &= ~(1ULL << 0);
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write_pmblimitr_el1(v);
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isb();
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}
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static void *spe_drain_buffers_hook(const void *arg)
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{
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if (!is_feat_spe_supported())
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return (void *)-1;
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/* Drain buffered data */
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psb_csync();
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dsbnsh();
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return (void *)0;
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}
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SUBSCRIBE_TO_EVENT(cm_entering_secure_world, spe_drain_buffers_hook);
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