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7300a4d167
In sunxi_soc_fdt_fixup(), we check for the value of "ret" again, after calling fdt_node_offset_by_phandle(), even though the error value of that lands in "node". Check for "node" being non-negative instead, to properly detect any errors here. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Change-Id: I57c1406388dbe11d343038da173019519e18af3e
72 lines
1.8 KiB
C
72 lines
1.8 KiB
C
/*
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* Copyright (c) 2024, ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Amend the device tree to adjust the L2 cache size, which is different
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* between the revisions of the H616 chips: earlier versions have 256 KB of L2,
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* later versions 1 MB.
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* Read the cache ID registers and adjust the size and number of sets entries
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* in the L2 cache DT node.
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*/
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#include <common/fdt_wrappers.h>
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#include <lib/utils_def.h>
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#include <libfdt.h>
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#define CACHE_L1D 0x0
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#define CACHE_L1I 0x1
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#define CACHE_L2U 0x2
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#define CCSIDR_SETS_SHIFT 13
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#define CCSIDR_SETS_MASK GENMASK(14, 0)
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#define CCSIDR_ASSOC_SHIFT 3
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#define CCSIDR_ASSOC_MASK GENMASK(9, 0)
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#define CCSIDR_LSIZE_SHIFT 0
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#define CCSIDR_LSIZE_MASK GENMASK(2, 0)
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static uint32_t armv8_get_ccsidr(unsigned int sel)
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{
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uint32_t reg;
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__asm__ volatile ("msr CSSELR_EL1, %0\n" :: "r" (sel));
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__asm__ volatile ("mrs %0, CCSIDR_EL1\n" : "=r" (reg));
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return reg;
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}
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void sunxi_soc_fdt_fixup(void *dtb)
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{
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int node = fdt_path_offset(dtb, "/cpus/cpu@0");
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uint32_t phandle, ccsidr, cell;
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int sets, line_size, assoc;
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int ret;
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if (node < 0) {
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return;
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}
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ret = fdt_read_uint32(dtb, node, "next-level-cache", &phandle);
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if (ret != 0) {
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return;
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}
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node = fdt_node_offset_by_phandle(dtb, phandle);
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if (node < 0) {
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return;
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}
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ccsidr = armv8_get_ccsidr(CACHE_L2U);
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sets = ((ccsidr >> CCSIDR_SETS_SHIFT) & CCSIDR_SETS_MASK) + 1;
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line_size = 16U << ((ccsidr >> CCSIDR_LSIZE_SHIFT) & CCSIDR_LSIZE_MASK);
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assoc = ((ccsidr >> CCSIDR_ASSOC_SHIFT) & CCSIDR_ASSOC_MASK) + 1;
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cell = cpu_to_fdt32(sets);
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fdt_setprop(dtb, node, "cache-sets", &cell, sizeof(cell));
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cell = cpu_to_fdt32(line_size);
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fdt_setprop(dtb, node, "cache-line-size", &cell, sizeof(cell));
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cell = cpu_to_fdt32(sets * assoc * line_size);
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fdt_setprop(dtb, node, "cache-size", &cell, sizeof(cell));
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}
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