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https://github.com/ARM-software/arm-trusted-firmware.git
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2a1cdee4f5
Added platform hooks to retrieve DRTM features and address map. Additionally, implemented these hooks for the FVP platform. Signed-off-by: John Powell <john.powell@arm.com> Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I5621cc9807ffff8139ae8876250147f7b2c76759
88 lines
2.5 KiB
C
88 lines
2.5 KiB
C
/*
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* Copyright (c) 2022 Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdint.h>
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#include <plat/common/platform.h>
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#include <services/drtm_svc.h>
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#include <platform_def.h>
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/* Address map revision generated by this code. */
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#define DRTM_ADDRESS_MAP_REVISION U(0x0001)
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/* Amount of space needed for address map based on PLAT_DRTM_MMAP_ENTRIES */
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#define DRTM_ADDRESS_MAP_SIZE (sizeof(drtm_memory_region_descriptor_table_t) + \
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(sizeof(drtm_mem_region_t) * \
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PLAT_DRTM_MMAP_ENTRIES))
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/* Allocate space for DRTM-formatted address map to be constructed. */
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static uint8_t drtm_address_map[DRTM_ADDRESS_MAP_SIZE];
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static uint64_t drtm_address_map_size;
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drtm_memory_region_descriptor_table_t *drtm_build_address_map(void)
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{
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/* Set up pointer to DRTM memory map. */
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drtm_memory_region_descriptor_table_t *map =
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(drtm_memory_region_descriptor_table_t *)drtm_address_map;
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/* Get the platform memory map. */
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const mmap_region_t *mmap = plat_get_addr_mmap();
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unsigned int i;
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/* Set up header for address map structure. */
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map->revision = DRTM_ADDRESS_MAP_REVISION;
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map->reserved = 0x0000;
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/* Iterate through mmap and generate DRTM address map. */
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for (i = 0U; mmap[i].base_pa != 0UL; i++) {
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/* Set PA of region. */
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map->region[i].region_address = mmap[i].base_pa;
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/* Set size of region (in 4kb chunks). */
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map->region[i].region_size_type = 0;
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ARM_DRTM_REGION_SIZE_TYPE_SET_4K_PAGE_NUM(
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map->region[i].region_size_type,
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mmap[i].size / PAGE_SIZE_4KB);
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/* Set type and cacheability. */
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switch (MT_TYPE(mmap[i].attr)) {
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case MT_DEVICE:
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ARM_DRTM_REGION_SIZE_TYPE_SET_REGION_TYPE(
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map->region[i].region_size_type,
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ARM_DRTM_REGION_SIZE_TYPE_REGION_TYPE_DEVICE);
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break;
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case MT_NON_CACHEABLE:
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ARM_DRTM_REGION_SIZE_TYPE_SET_REGION_TYPE(
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map->region[i].region_size_type,
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ARM_DRTM_REGION_SIZE_TYPE_REGION_TYPE_NCAR);
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ARM_DRTM_REGION_SIZE_TYPE_SET_CACHEABILITY(
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map->region[i].region_size_type,
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ARM_DRTM_REGION_SIZE_TYPE_CACHEABILITY_NC);
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break;
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case MT_MEMORY:
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ARM_DRTM_REGION_SIZE_TYPE_SET_REGION_TYPE(
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map->region[i].region_size_type,
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ARM_DRTM_REGION_SIZE_TYPE_REGION_TYPE_NORMAL);
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break;
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default:
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return NULL;
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}
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}
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map->num_regions = i;
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/* Store total size of address map. */
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drtm_address_map_size = sizeof(drtm_memory_region_descriptor_table_t);
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drtm_address_map_size += (i * sizeof(drtm_mem_region_t));
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return map;
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}
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uint64_t drtm_get_address_map_size(void)
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{
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return drtm_address_map_size;
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}
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