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New SoC is a78 based with gicv3 and uart over pl011. Communication interfaces are similar to Versal NET platform. System starts with AMD PLM firmware which loads TF-A(bl31) to memory, which is already configured, and jumps to it. PLM also prepare handoff structure for TF-A with information what components were load and flags which indicate which EL level SW should be started. Change-Id: I5065b1b7ec4ee58e77dc4096747758480c84009c Signed-off-by: Amit Nagal <amit.nagal@amd.com> Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com>
55 lines
1.5 KiB
C
55 lines
1.5 KiB
C
/*
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* Copyright (c) 2018-2019, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved.
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* Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PLAT_PRIVATE_H
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#define PLAT_PRIVATE_H
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#include <bl31/interrupt_mgmt.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#define SPP_PSXC_MMI_V2_0 U(6)
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#define SPP_PSXC_MMI_V3_0 U(8)
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/* MMD */
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#define SPP_PSXC_ISP_AIE_V2_0 U(3)
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#define SPP_PSXC_MMD_AIE_FRZ_EA U(4)
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#define SPP_PSXC_MMD_AIE_V3_0 U(5)
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typedef struct versal_intr_info_type_el3 {
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uint32_t id;
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interrupt_type_handler_t handler;
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} versal_intr_info_type_el3_t;
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void config_setup(void);
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uint32_t get_uart_clk(void);
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const mmap_region_t *plat_get_mmap(void);
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void plat_gic_driver_init(void);
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void plat_gic_init(void);
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void plat_gic_cpuif_enable(void);
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void plat_gic_cpuif_disable(void);
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void plat_gic_pcpu_init(void);
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void plat_gic_save(void);
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void plat_gic_resume(void);
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void plat_gic_redistif_on(void);
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void plat_gic_redistif_off(void);
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extern uint32_t cpu_clock, platform_id, platform_version;
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void board_detection(void);
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const char *board_name_decode(void);
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uint64_t smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
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uint64_t x4, void *cookie, void *handle, uint64_t flags);
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int32_t sip_svc_setup_init(void);
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/*
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* Register handler to specific GIC entrance
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* for INTR_TYPE_EL3 type of interrupt
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*/
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int request_intr_type_el3(uint32_t irq, interrupt_type_handler_t fiq_handler);
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#endif /* PLAT_PRIVATE_H */
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