mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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5de1ace54a
1. Turn on APU SMPU protection on MT8196. 2. Remove unused header file. Change-Id: I58637b8dda4bf68253bc2329580963a8bd9cca8b Signed-off-by: Karl Li <karl.li@mediatek.com>
81 lines
2.4 KiB
C
81 lines
2.4 KiB
C
/*
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* Copyright (c) 2024-2025, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#define ENABLE_SMPU_PROTECT (1)
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#if ENABLE_SMPU_PROTECT
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#include "emi.h"
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#endif
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include <apusys_security_ctrl_plat.h>
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#define APUSYS_SEC_FW_EMI_REGION (23)
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#define bits_clr(x, m, o) (x & (~(m << o)))
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#define bits_set(x, v, m, o) ((bits_clr(x, m, o)) | ((v & m) << o))
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static void sec_sideband_init(void)
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{
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uint32_t value = mmio_read_32(SEC_CTRL_SIDE_BAND);
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value = bits_set(value, SEC_CTRL_NARE_DOMAIN, SEC_CTRL_DOMAIN_MASK,
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SEC_CTRL_NARE_DOMAIN_SHF);
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value = bits_set(value, SEC_CTRL_NARE_NS, SEC_CTRL_NS_MASK, SEC_CTRL_NARE_NS_SHF);
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value = bits_set(value, SEC_CTRL_SARE0_DOMAIN, SEC_CTRL_DOMAIN_MASK,
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SEC_CTRL_SARE0_DOMAIN_SHF);
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value = bits_set(value, SEC_CTRL_SARE0_NS, SEC_CTRL_NS_MASK, SEC_CTRL_SARE0_NS_SHF);
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value = bits_set(value, SEC_CTRL_SARE1_DOMAIN, SEC_CTRL_DOMAIN_MASK,
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SEC_CTRL_SARE1_DOMAIN_SHF);
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value = bits_set(value, SEC_CTRL_SARE1_NS, SEC_CTRL_NS_MASK, SEC_CTRL_SARE1_NS_SHF);
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mmio_write_32(SEC_CTRL_SIDE_BAND, value);
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}
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static void domain_remap_init(void)
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{
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const uint32_t remap_domains[] = {
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D0_REMAP_DOMAIN, D1_REMAP_DOMAIN, D2_REMAP_DOMAIN, D3_REMAP_DOMAIN,
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D4_REMAP_DOMAIN, D5_REMAP_DOMAIN, D6_REMAP_DOMAIN, D7_REMAP_DOMAIN,
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D8_REMAP_DOMAIN, D9_REMAP_DOMAIN, D10_REMAP_DOMAIN, D11_REMAP_DOMAIN,
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D12_REMAP_DOMAIN, D13_REMAP_DOMAIN, D14_REMAP_DOMAIN, D15_REMAP_DOMAIN,
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};
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uint32_t lower_domain = 0;
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uint32_t higher_domain = 0;
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int i;
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for (i = 0; i < ARRAY_SIZE(remap_domains); i++) {
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if (i < SEC_CTRL_REG_DOMAIN_NUM)
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lower_domain |= (remap_domains[i] << (i * REG_DOMAIN_BITS));
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else
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higher_domain |= (remap_domains[i] <<
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((i - SEC_CTRL_REG_DOMAIN_NUM) * REG_DOMAIN_BITS));
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}
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mmio_write_32(SEC_CTRL_SOC2APU_SET1_0, lower_domain);
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mmio_write_32(SEC_CTRL_SOC2APU_SET1_1, higher_domain);
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mmio_setbits_32(APU_SEC_CON, SEC_CTRL_DOMAIN_REMAP_SEL);
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}
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void apusys_security_ctrl_init(void)
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{
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domain_remap_init();
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sec_sideband_init();
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}
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int apusys_plat_setup_sec_mem(void)
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{
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#if ENABLE_SMPU_PROTECT
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return sip_emi_mpu_set_protection(APU_RESERVE_MEMORY >> EMI_MPU_ALIGN_BITS,
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(APU_RESERVE_MEMORY + APU_RESERVE_SIZE) >> EMI_MPU_ALIGN_BITS,
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APUSYS_SEC_FW_EMI_REGION);
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#else
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INFO("%s: Bypass SMPU protection setup.\n", __func__);
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return 0;
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#endif
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}
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