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https://github.com/ARM-software/arm-trusted-firmware.git
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6e19bd563d
This patch provides separation of GICD, GICR accessor functions and adds new macros for GICv3 registers access as a preparation for GICv3.1 and GICv4 support. NOTE: Platforms need to modify to include both 'gicdv3_helpers.c' and 'gicrv3_helpers.c' instead of the single helper file previously. Change-Id: I1641bd6d217d6eb7d1228be3c4177b2d556da60a Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
113 lines
3.5 KiB
Makefile
113 lines
3.5 KiB
Makefile
#
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# Copyright (c) 2019, Linaro Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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CRASH_REPORTING := 1
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include lib/libfdt/libfdt.mk
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# Enable new version of image loading on QEMU platforms
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LOAD_IMAGE_V2 := 1
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ifeq ($(NEED_BL32),yes)
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$(eval $(call add_define,QEMU_LOAD_BL32))
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endif
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PLAT_QEMU_PATH := plat/qemu/qemu_sbsa
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PLAT_QEMU_COMMON_PATH := plat/qemu/common
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PLAT_INCLUDES := -Iinclude/plat/arm/common/ \
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-I${PLAT_QEMU_COMMON_PATH}/include \
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-I${PLAT_QEMU_PATH}/include \
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-Iinclude/common/tbbr
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PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH}
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PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \
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${PLAT_QEMU_COMMON_PATH}/qemu_console.c \
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drivers/arm/pl011/${ARCH}/pl011_console.S
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include lib/xlat_tables_v2/xlat_tables.mk
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PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
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BL1_SOURCES += drivers/io/io_semihosting.c \
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drivers/io/io_storage.c \
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drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
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${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c
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BL1_SOURCES += lib/cpus/aarch64/aem_generic.S \
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lib/cpus/aarch64/cortex_a53.S \
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lib/cpus/aarch64/cortex_a57.S
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BL2_SOURCES += drivers/io/io_semihosting.c \
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drivers/io/io_storage.c \
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drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \
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${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \
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common/fdt_fixup.c \
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$(LIBFDT_SRCS)
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ifeq (${LOAD_IMAGE_V2},1)
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BL2_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \
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${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \
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common/desc_image_load.c
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endif
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QEMU_GIC_SOURCES := drivers/arm/gic/v3/gicv3_helpers.c \
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drivers/arm/gic/v3/gicdv3_helpers.c \
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drivers/arm/gic/v3/gicrv3_helpers.c \
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drivers/arm/gic/v3/gicv3_main.c \
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drivers/arm/gic/common/gic_common.c \
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plat/common/plat_gicv3.c \
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${PLAT_QEMU_COMMON_PATH}/qemu_gicv3.c
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BL31_SOURCES += lib/cpus/aarch64/aem_generic.S \
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lib/cpus/aarch64/cortex_a53.S \
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lib/cpus/aarch64/cortex_a57.S \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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plat/common/plat_psci_common.c \
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${PLAT_QEMU_COMMON_PATH}/qemu_pm.c \
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${PLAT_QEMU_COMMON_PATH}/topology.c \
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${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \
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${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \
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${QEMU_GIC_SOURCES}
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SEPARATE_CODE_AND_RODATA := 1
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ENABLE_STACK_PROTECTOR := 0
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ifneq ($(ENABLE_STACK_PROTECTOR), 0)
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PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c
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endif
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MULTI_CONSOLE_API := 1
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# Disable the PSCI platform compatibility layer
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ENABLE_PLAT_COMPAT := 0
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# Use known base for UEFI if not given from command line
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# By default BL33 is at FLASH1 base
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PRELOADED_BL33_BASE ?= 0x10000000
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# Qemu SBSA plafrom only support SEC_SRAM
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BL32_RAM_LOCATION_ID = SEC_SRAM_ID
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$(eval $(call add_define,BL32_RAM_LOCATION_ID))
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# Don't have the Linux kernel as a BL33 image by default
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ARM_LINUX_KERNEL_AS_BL33 := 0
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$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
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$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
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ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE
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$(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
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# Do not enable SVE
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ENABLE_SVE_FOR_NS := 0
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