Jayanth Dodderi Chidanand 6d0433f040 feat(the): add support for FEAT_THE ... Arm v8.9 introduces FEAT_THE, adding Translation Hardening Extension Read-Check-Write mask registers, RCWMASK_EL1 and RCWSMASK_EL1. Support this, context switching the registers and disabling traps so lower ELs can access the new registers. Change the FVP platform to default to handling this as a dynamic option so the right decision can be made by the code at runtime. Change-Id: I8775787f523639b39faf61d046ef482f73b2a562 Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>		2024-10-13 18:44:54 -05:00
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aarch32	refactor(cpufeat): add macro to simplify is_feat_xx_present	2024-05-02 12:16:16 -05:00
aarch64	feat(the): add support for FEAT_THE	2024-10-13 18:44:54 -05:00
cpu_data_array.c	chore: update to use Arm word across TF-A	2023-08-08 15:12:30 +01:00
simd_ctx.c	feat(simd): introduce simd context helper APIs	2024-08-19 11:10:10 -05:00