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![]() Arm v8.9 introduces FEAT_THE, adding Translation Hardening Extension Read-Check-Write mask registers, RCWMASK_EL1 and RCWSMASK_EL1. Support this, context switching the registers and disabling traps so lower ELs can access the new registers. Change the FVP platform to default to handling this as a dynamic option so the right decision can be made by the code at runtime. Change-Id: I8775787f523639b39faf61d046ef482f73b2a562 Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Signed-off-by: Govindraj Raja <govindraj.raja@arm.com> |
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aarch32 | ||
aarch64 | ||
backtrace | ||
bl_common.c | ||
desc_image_load.c | ||
fdt_fixup.c | ||
fdt_wrappers.c | ||
fdt_wrappers.mk | ||
feat_detect.c | ||
image_decompress.c | ||
runtime_svc.c | ||
tf_crc32.c | ||
tf_log.c | ||
uuid.c |