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This patch adds architectural features detection procedure to ensure features enabled are present in the given hardware implementation. It verifies whether the architecture build flags passed during compilation match the respective features by reading their ID registers. It reads through all the enabled feature specific ID registers at once and panics in case of mismatch(feature enabled but not implemented in PE). Feature flags are used at sections (context_management, save and restore routines of registers) during context switch. If the enabled feature flag is not supported by the PE, it causes an exception while saving or restoring the registers guarded by them. With this mechanism, the build flags are validated at an early phase prior to their usage, thereby preventing any undefined action under their control. This implementation is based on tristate approach for each feature and currently FEAT_STATE=0 and FEAT_STATE=1 are covered as part of this patch. FEAT_STATE=2 is planned for phase-2 implementation and will be taken care separately. The patch has been explicitly tested, by adding a new test_config with build config enabling majority of the features and detected all of them under FVP launched with parameters enabling v8.7 features. Note: This is an experimental procedure and the mechanism itself is guarded by a macro "FEATURE_DETECTION", which is currently being disabled by default. The "FEATURE_DETECTION" macro is documented and the platforms are encouraged to make use of this diagnostic tool by enabling this "FEATURE_DETECTION" flag explicitly and get used to its behaviour during booting before the procedure gets mandated. Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: Ia23d95430fe82d417a938b672bfb5edc401b0f43
283 lines
9.2 KiB
C
283 lines
9.2 KiB
C
/*
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* Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <string.h>
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#include <arch.h>
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#include <arch_features.h>
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#include <arch_helpers.h>
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#include <bl31/bl31.h>
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#include <bl31/ehf.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <common/feat_detect.h>
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#include <common/runtime_svc.h>
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#include <drivers/console.h>
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#include <lib/el3_runtime/context_mgmt.h>
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#include <lib/pmf/pmf.h>
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#include <lib/runtime_instr.h>
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#include <plat/common/platform.h>
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#include <services/std_svc.h>
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#if ENABLE_RUNTIME_INSTRUMENTATION
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PMF_REGISTER_SERVICE_SMC(rt_instr_svc, PMF_RT_INSTR_SVC_ID,
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RT_INSTR_TOTAL_IDS, PMF_STORE_ENABLE)
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#endif
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/*******************************************************************************
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* This function pointer is used to initialise the BL32 image. It's initialized
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* by SPD calling bl31_register_bl32_init after setting up all things necessary
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* for SP execution. In cases where both SPD and SP are absent, or when SPD
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* finds it impossible to execute SP, this pointer is left as NULL
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******************************************************************************/
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static int32_t (*bl32_init)(void);
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/*****************************************************************************
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* Function used to initialise RMM if RME is enabled
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*****************************************************************************/
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#if ENABLE_RME
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static int32_t (*rmm_init)(void);
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#endif
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/*******************************************************************************
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* Variable to indicate whether next image to execute after BL31 is BL33
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* (non-secure & default) or BL32 (secure).
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******************************************************************************/
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static uint32_t next_image_type = NON_SECURE;
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#ifdef SUPPORT_UNKNOWN_MPID
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/*
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* Flag to know whether an unsupported MPID has been detected. To avoid having it
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* landing on the .bss section, it is initialized to a non-zero value, this way
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* we avoid potential WAW hazards during system bring up.
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* */
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volatile uint32_t unsupported_mpid_flag = 1;
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#endif
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/*
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* Implement the ARM Standard Service function to get arguments for a
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* particular service.
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*/
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uintptr_t get_arm_std_svc_args(unsigned int svc_mask)
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{
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/* Setup the arguments for PSCI Library */
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DEFINE_STATIC_PSCI_LIB_ARGS_V1(psci_args, bl31_warm_entrypoint);
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/* PSCI is the only ARM Standard Service implemented */
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assert(svc_mask == PSCI_FID_MASK);
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return (uintptr_t)&psci_args;
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}
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/*******************************************************************************
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* Simple function to initialise all BL31 helper libraries.
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******************************************************************************/
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void __init bl31_lib_init(void)
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{
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cm_init();
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}
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/*******************************************************************************
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* Setup function for BL31.
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******************************************************************************/
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void bl31_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
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u_register_t arg3)
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{
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/* Perform early platform-specific setup */
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bl31_early_platform_setup2(arg0, arg1, arg2, arg3);
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/* Perform late platform-specific setup */
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bl31_plat_arch_setup();
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#if ENABLE_FEAT_HCX
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/*
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* Assert that FEAT_HCX is supported on this system, without this check
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* an exception would occur during context save/restore if enabled but
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* not supported.
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*/
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assert(is_feat_hcx_present());
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#endif /* ENABLE_FEAT_HCX */
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#if CTX_INCLUDE_PAUTH_REGS
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/*
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* Assert that the ARMv8.3-PAuth registers are present or an access
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* fault will be triggered when they are being saved or restored.
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*/
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assert(is_armv8_3_pauth_present());
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#endif /* CTX_INCLUDE_PAUTH_REGS */
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}
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/*******************************************************************************
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* BL31 is responsible for setting up the runtime services for the primary cpu
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* before passing control to the bootloader or an Operating System. This
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* function calls runtime_svc_init() which initializes all registered runtime
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* services. The run time services would setup enough context for the core to
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* switch to the next exception level. When this function returns, the core will
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* switch to the programmed exception level via an ERET.
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******************************************************************************/
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void bl31_main(void)
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{
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NOTICE("BL31: %s\n", version_string);
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NOTICE("BL31: %s\n", build_message);
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#if FEATURE_DETECTION
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/* Detect if features enabled during compilation are supported by PE. */
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detect_arch_features();
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#endif /* FEATURE_DETECTION */
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#ifdef SUPPORT_UNKNOWN_MPID
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if (unsupported_mpid_flag == 0) {
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NOTICE("Unsupported MPID detected!\n");
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}
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#endif
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/* Perform platform setup in BL31 */
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bl31_platform_setup();
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/* Initialise helper libraries */
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bl31_lib_init();
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#if EL3_EXCEPTION_HANDLING
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INFO("BL31: Initialising Exception Handling Framework\n");
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ehf_init();
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#endif
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/* Initialize the runtime services e.g. psci. */
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INFO("BL31: Initializing runtime services\n");
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runtime_svc_init();
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/*
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* All the cold boot actions on the primary cpu are done. We now need to
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* decide which is the next image and how to execute it.
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* If the SPD runtime service is present, it would want to pass control
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* to BL32 first in S-EL1. In that case, SPD would have registered a
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* function to initialize bl32 where it takes responsibility of entering
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* S-EL1 and returning control back to bl31_main. Similarly, if RME is
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* enabled and a function is registered to initialize RMM, control is
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* transferred to RMM in R-EL2. After RMM initialization, control is
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* returned back to bl31_main. Once this is done we can prepare entry
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* into BL33 as normal.
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*/
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/*
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* If SPD had registered an init hook, invoke it.
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*/
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if (bl32_init != NULL) {
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INFO("BL31: Initializing BL32\n");
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int32_t rc = (*bl32_init)();
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if (rc == 0) {
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WARN("BL31: BL32 initialization failed\n");
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}
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}
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/*
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* If RME is enabled and init hook is registered, initialize RMM
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* in R-EL2.
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*/
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#if ENABLE_RME
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if (rmm_init != NULL) {
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INFO("BL31: Initializing RMM\n");
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int32_t rc = (*rmm_init)();
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if (rc == 0) {
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WARN("BL31: RMM initialization failed\n");
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}
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}
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#endif
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/*
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* We are ready to enter the next EL. Prepare entry into the image
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* corresponding to the desired security state after the next ERET.
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*/
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bl31_prepare_next_image_entry();
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console_flush();
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/*
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* Perform any platform specific runtime setup prior to cold boot exit
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* from BL31
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*/
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bl31_plat_runtime_setup();
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}
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/*******************************************************************************
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* Accessor functions to help runtime services decide which image should be
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* executed after BL31. This is BL33 or the non-secure bootloader image by
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* default but the Secure payload dispatcher could override this by requesting
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* an entry into BL32 (Secure payload) first. If it does so then it should use
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* the same API to program an entry into BL33 once BL32 initialisation is
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* complete.
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******************************************************************************/
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void bl31_set_next_image_type(uint32_t security_state)
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{
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assert(sec_state_is_valid(security_state));
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next_image_type = security_state;
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}
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uint32_t bl31_get_next_image_type(void)
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{
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return next_image_type;
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}
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/*******************************************************************************
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* This function programs EL3 registers and performs other setup to enable entry
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* into the next image after BL31 at the next ERET.
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******************************************************************************/
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void __init bl31_prepare_next_image_entry(void)
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{
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entry_point_info_t *next_image_info;
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uint32_t image_type;
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#if CTX_INCLUDE_AARCH32_REGS
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/*
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* Ensure that the build flag to save AArch32 system registers in CPU
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* context is not set for AArch64-only platforms.
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*/
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if (el_implemented(1) == EL_IMPL_A64ONLY) {
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ERROR("EL1 supports AArch64-only. Please set build flag "
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"CTX_INCLUDE_AARCH32_REGS = 0\n");
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panic();
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}
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#endif
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/* Determine which image to execute next */
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image_type = bl31_get_next_image_type();
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/* Program EL3 registers to enable entry into the next EL */
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next_image_info = bl31_plat_get_next_image_ep_info(image_type);
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assert(next_image_info != NULL);
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assert(image_type == GET_SECURITY_STATE(next_image_info->h.attr));
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INFO("BL31: Preparing for EL3 exit to %s world\n",
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(image_type == SECURE) ? "secure" : "normal");
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print_entry_point_info(next_image_info);
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cm_init_my_context(next_image_info);
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cm_prepare_el3_exit(image_type);
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}
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/*******************************************************************************
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* This function initializes the pointer to BL32 init function. This is expected
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* to be called by the SPD after it finishes all its initialization
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******************************************************************************/
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void bl31_register_bl32_init(int32_t (*func)(void))
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{
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bl32_init = func;
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}
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#if ENABLE_RME
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/*******************************************************************************
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* This function initializes the pointer to RMM init function. This is expected
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* to be called by the RMMD after it finishes all its initialization
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******************************************************************************/
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void bl31_register_rmm_init(int32_t (*func)(void))
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{
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rmm_init = func;
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}
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#endif
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