mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-15 00:54:22 +00:00
696ed16877
Move platform.mk inclusion in top level Makefile to permit a platform specifying BRANCH_PROTECTION option. Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I1f662f82cd949eedfdbb61b9f66de15c46fb3106
399 lines
11 KiB
Makefile
399 lines
11 KiB
Makefile
#
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# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
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#
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# Copyright (c) 2017-2023 Nuvoton Ltd.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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# This is a debug flag for bring-up. It allows reducing CPU numbers
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# SECONDARY_BRINGUP := 1
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RESET_TO_BL31 := 1
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SPMD_SPM_AT_SEL2 := 0
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#temporary until the RAM size is reduced
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USE_COHERENT_MEM := 1
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INIT_UNUSED_NS_EL2 := 1
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$(eval $(call add_define,RESET_TO_BL31))
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ifeq (${ARCH}, aarch64)
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# On ARM standard platorms, the TSP can execute from Trusted SRAM,
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# Trusted DRAM (if available) or the TZC secured area of DRAM.
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# TZC secured DRAM is the default.
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ARM_TSP_RAM_LOCATION ?= dram
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ifeq (${ARM_TSP_RAM_LOCATION}, tsram)
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ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
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else ifeq (${ARM_TSP_RAM_LOCATION}, tdram)
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ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID
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else ifeq (${ARM_TSP_RAM_LOCATION}, dram)
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ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID
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else
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$(error "Unsupported ARM_TSP_RAM_LOCATION value")
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endif
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# Process flags
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# Process ARM_BL31_IN_DRAM flag
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ARM_BL31_IN_DRAM := 0
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$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
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$(eval $(call add_define,ARM_BL31_IN_DRAM))
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else
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ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID
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endif
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$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
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# For the original power-state parameter format, the State-ID can be encoded
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# according to the recommended encoding or zero. This flag determines which
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# State-ID encoding to be parsed.
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ARM_RECOM_STATE_ID_ENC := 0
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# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC
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# need to be set. Else throw a build error.
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ifeq (${PSCI_EXTENDED_STATE_ID}, 1)
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ifeq (${ARM_RECOM_STATE_ID_ENC}, 0)
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$(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \
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PSCI_EXTENDED_STATE_ID is set for ARM platforms)
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endif
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endif
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# Process ARM_RECOM_STATE_ID_ENC flag
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$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC))
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$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC))
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# Process ARM_DISABLE_TRUSTED_WDOG flag
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# By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set
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ARM_DISABLE_TRUSTED_WDOG := 0
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ifeq (${SPIN_ON_BL1_EXIT}, 1)
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ARM_DISABLE_TRUSTED_WDOG := 1
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endif
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$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG))
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$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG))
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# Process ARM_CONFIG_CNTACR
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ARM_CONFIG_CNTACR := 1
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$(eval $(call assert_boolean,ARM_CONFIG_CNTACR))
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$(eval $(call add_define,ARM_CONFIG_CNTACR))
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# Process ARM_BL31_IN_DRAM flag
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ARM_BL31_IN_DRAM := 0
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$(eval $(call assert_boolean,ARM_BL31_IN_DRAM))
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$(eval $(call add_define,ARM_BL31_IN_DRAM))
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# Process ARM_PLAT_MT flag
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ARM_PLAT_MT := 0
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$(eval $(call assert_boolean,ARM_PLAT_MT))
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$(eval $(call add_define,ARM_PLAT_MT))
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# Use translation tables library v2 by default
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ARM_XLAT_TABLES_LIB_V1 := 0
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$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1))
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$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1))
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# Don't have the Linux kernel as a BL33 image by default
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ARM_LINUX_KERNEL_AS_BL33 := 0
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$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33))
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$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33))
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ifeq (${ARM_LINUX_KERNEL_AS_BL33},1)
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ifeq (${ARCH},aarch64)
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ifneq (${RESET_TO_BL31},1)
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$(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_BL31=1.")
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endif
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else
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ifneq (${RESET_TO_SP_MIN},1)
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$(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.")
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endif
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endif
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ifndef PRELOADED_BL33_BASE
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$(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
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endif
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ifndef ARM_PRELOADED_DTB_BASE
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$(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
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endif
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$(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
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endif
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# Use an implementation of SHA-256 with a smaller memory footprint
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# but reduced speed.
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$(eval $(call add_define,MBEDTLS_SHA256_SMALLER))
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# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
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# in the FIP if the platform requires.
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ifneq ($(BL32_EXTRA1),)
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$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
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endif
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ifneq ($(BL32_EXTRA2),)
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$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
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endif
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# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms
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ENABLE_PSCI_STAT := 1
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ENABLE_PMF := 1
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# On ARM platforms, separate the code and read-only data sections to allow
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# mapping the former as executable and the latter as execute-never.
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SEPARATE_CODE_AND_RODATA := 1
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# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS
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# and NOBITS sections of BL31 image are adjacent to each other and loaded
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# into Trusted SRAM.
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SEPARATE_NOBITS_REGION := 0
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# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load
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# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate
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# the build to require that ARM_BL31_IN_DRAM is enabled as well.
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ifeq ($(SEPARATE_NOBITS_REGION),1)
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ifneq ($(ARM_BL31_IN_DRAM),1)
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$(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled)
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endif
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ifneq ($(RECLAIM_INIT_CODE),0)
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$(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported)
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endif
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endif
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# Disable ARM Cryptocell by default
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ARM_CRYPTOCELL_INTEG := 0
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$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))
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$(eval $(call add_define,ARM_CRYPTOCELL_INTEG))
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# Enable PIE support for RESET_TO_BL31 case
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ifeq (${RESET_TO_BL31},1)
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ENABLE_PIE := 1
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endif
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# CryptoCell integration relies on coherent buffers for passing data from
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# the AP CPU to the CryptoCell
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ifeq (${ARM_CRYPTOCELL_INTEG},1)
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ifeq (${USE_COHERENT_MEM},0)
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$(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.")
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endif
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endif
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PLAT_INCLUDES := -Iinclude/plat/nuvoton/npcm845x \
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-Iinclude/plat/nuvoton/common \
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-Iinclude/drivers/nuvoton/npcm845x \
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ifeq (${ARCH}, aarch64)
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PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64
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endif
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# Include GICv3 driver files
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include drivers/arm/gic/v2/gicv2.mk
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NPCM850_GIC_SOURCES := ${GICV2_SOURCES}
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BL31_SOURCES +=lib/cpus/aarch64/cortex_a35.S \
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plat/common/plat_psci_common.c \
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drivers/ti/uart/aarch64/16550_console.S \
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plat/nuvoton/npcm845x/npcm845x_psci.c \
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plat/nuvoton/npcm845x/npcm845x_serial_port.c \
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plat/nuvoton/common/nuvoton_topology.c \
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plat/nuvoton/npcm845x/npcm845x_bl31_setup.c
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PLAT_BL_COMMON_SOURCES := drivers/delay_timer/delay_timer.c \
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drivers/delay_timer/generic_delay_timer.c \
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plat/common/plat_gicv2.c \
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plat/arm/common/arm_gicv2.c \
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plat/nuvoton/common/plat_nuvoton_gic.c \
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${NPCM850_GIC_SOURCES} \
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plat/nuvoton/npcm845x/npcm845x_common.c \
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plat/nuvoton/common/nuvoton_helpers.S \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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plat/arm/common/arm_common.c \
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plat/arm/common/arm_console.c
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ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
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PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \
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lib/xlat_tables/${ARCH}/xlat_tables.c
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else
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include lib/xlat_tables_v2/xlat_tables.mk
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PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS}
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endif
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ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \
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plat/arm/common/fconf/arm_fconf_io.c
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ifeq (${SPD},spmd)
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ifeq (${SPMD_SPM_AT_SEL2},1)
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ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c
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endif
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endif
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BL1_SOURCES += drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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drivers/io/io_storage.c \
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plat/arm/common/arm_bl1_setup.c \
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plat/arm/common/arm_err.c \
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${ARM_IO_SOURCES}
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ifdef EL3_PAYLOAD_BASE
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# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs
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# from their holding pen
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BL1_SOURCES += plat/arm/common/arm_pm.c
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endif
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BL2_SOURCES += drivers/delay_timer/delay_timer.c \
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drivers/delay_timer/generic_delay_timer.c \
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drivers/io/io_fip.c \
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drivers/io/io_memmap.c \
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drivers/io/io_storage.c \
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plat/arm/common/arm_bl2_setup.c \
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plat/arm/common/arm_err.c \
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${ARM_IO_SOURCES}
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# Firmware Configuration Framework sources
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include lib/fconf/fconf.mk
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# Add `libfdt` and Arm common helpers required for Dynamic Config
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include lib/libfdt/libfdt.mk
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DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \
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plat/arm/common/arm_dyn_cfg_helpers.c \
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common/fdt_wrappers.c
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BL1_SOURCES += ${DYN_CFG_SOURCES}
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BL2_SOURCES += ${DYN_CFG_SOURCES}
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ifeq (${BL2_AT_EL3},1)
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BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c
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endif
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# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use
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# the AArch32 descriptors.
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BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c
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BL2_SOURCES += plat/arm/common/arm_image_load.c \
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common/desc_image_load.c
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ifeq (${SPD},opteed)
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BL2_SOURCES += lib/optee/optee_utils.c
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endif
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BL2U_SOURCES += drivers/delay_timer/delay_timer.c \
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drivers/delay_timer/generic_delay_timer.c \
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plat/arm/common/arm_bl2u_setup.c
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BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \
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plat/nuvoton/common/nuvoton_pm.c \
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plat/nuvoton/common/nuvoton_topology.c \
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plat/common/plat_psci_common.c
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ifeq (${ENABLE_PMF}, 1)
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ifeq (${ARCH}, aarch64)
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BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c \
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plat/arm/common/arm_sip_svc.c \
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plat/arm/common/plat_arm_sip_svc.c \
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lib/pmf/pmf_smc.c
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else
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BL32_SOURCES += plat/arm/common/arm_sip_svc.c \
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plat/arm/common/plat_arm_sip_svc.c \
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lib/pmf/pmf_smc.c
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endif
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endif
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ifeq (${EL3_EXCEPTION_HANDLING},1)
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BL31_SOURCES += plat/arm/common/aarch64/arm_ehf.c
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endif
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ifeq (${SDEI_SUPPORT},1)
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BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c
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ifeq (${SDEI_IN_FCONF},1)
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BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c
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endif
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endif
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# RAS sources
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ifeq (${RAS_EXTENSION},1)
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BL31_SOURCES += lib/extensions/ras/std_err_record.c \
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lib/extensions/ras/ras_common.c
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endif
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# Pointer Authentication sources
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ifeq ($(BRANCH_PROTECTION),$(filter $(BRANCH_PROTECTION),1 2 3))
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PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c
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endif
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ifeq (${SPD},spmd)
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BL31_SOURCES += plat/common/plat_spmd_manifest.c \
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common/fdt_wrappers.c \
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${LIBFDT_SRCS}
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endif
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ifneq (${TRUSTED_BOARD_BOOT},0)
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# Include common TBB sources
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AUTH_SOURCES := drivers/auth/auth_mod.c \
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drivers/auth/crypto_mod.c \
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drivers/auth/img_parser_mod.c \
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lib/fconf/fconf_tbbr_getter.c
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# Include the selected chain of trust sources.
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ifeq (${COT},tbbr)
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AUTH_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c
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BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_bl1.c
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BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_bl2.c
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else ifeq (${COT},dualroot)
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AUTH_SOURCES += drivers/auth/dualroot/cot.c
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else
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$(error Unknown chain of trust ${COT})
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endif
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BL1_SOURCES += ${AUTH_SOURCES} \
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bl1/tbbr/tbbr_img_desc.c \
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plat/arm/common/arm_bl1_fwu.c \
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plat/common/tbbr/plat_tbbr.c
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BL2_SOURCES += ${AUTH_SOURCES} \
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plat/common/tbbr/plat_tbbr.c
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$(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_))
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# We expect to locate the *.mk files under the directories specified below
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ifeq (${ARM_CRYPTOCELL_INTEG},0)
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CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk
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else
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CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk
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endif
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IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk
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$(info Including ${CRYPTO_LIB_MK})
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include ${CRYPTO_LIB_MK}
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$(info Including ${IMG_PARSER_LIB_MK})
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include ${IMG_PARSER_LIB_MK}
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endif
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ifeq (${RECLAIM_INIT_CODE}, 1)
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ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1)
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$(error "To reclaim init code xlat tables v2 must be used")
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endif
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endif
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ifeq (${MEASURED_BOOT},1)
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MEASURED_BOOT_MK := drivers/measured_boot/measured_boot.mk
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$(info Including ${MEASURED_BOOT_MK})
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include ${MEASURED_BOOT_MK}
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endif
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ifeq (${EL3_EXCEPTION_HANDLING},1)
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BL31_SOURCES += plat/arm/common/aarch64/arm_ehf.c
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endif
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BL1_SOURCES :=
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BL2_SOURCES :=
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BL2U_SOURCES :=
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DEBUG_CONSOLE ?= 0
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$(eval $(call add_define,DEBUG_CONSOLE))
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$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID))
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