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Add and map the carveout for loading Hafnium as BL32 image. Also define PLAT_ARM_SP_MAX_SIZE as 3 MB for secure partitions. Signed-off-by: Rohit Mathew <rohit.mathew@arm.com> Signed-off-by: Nishant Sharma <nishant.sharma@arm.com> Signed-off-by: Rakshit Goyal <rakshit.goyal@arm.com> Change-Id: I2845eb6807a127c9f6b92de2dabc9a58d25bd4d4
105 lines
2.2 KiB
C
105 lines
2.2 KiB
C
/*
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* Copyright (c) 2024-2025, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <drivers/arm/css/sds.h>
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#include <drivers/arm/sbsa.h>
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#include <lib/utils_def.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/common/platform.h>
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#include <platform_def.h>
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/*
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* Table of regions for different BL stages to map using the MMU.
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*/
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#if IMAGE_BL1
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const mmap_region_t plat_arm_mmap[] = {
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NRD_CSS_SHARED_RAM_MMAP(0),
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NRD_ROS_FLASH0_RO_MMAP,
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NRD_CSS_PERIPH_MMAP(0),
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NRD_ROS_PLATFORM_PERIPH_MMAP,
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NRD_ROS_SYSTEM_PERIPH_MMAP,
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{0}
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};
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#endif /* IMAGE_BL3 */
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#if IMAGE_BL2
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const mmap_region_t plat_arm_mmap[] = {
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NRD_CSS_SHARED_RAM_MMAP(0),
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NRD_ROS_FLASH0_RO_MMAP,
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#ifdef PLAT_ARM_MEM_PROT_ADDR
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NRD_ROS_V2M_MEM_PROTECT_MMAP,
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#endif
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NRD_CSS_PERIPH_MMAP(0),
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NRD_ROS_PLATFORM_PERIPH_MMAP,
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NRD_ROS_SYSTEM_PERIPH_MMAP,
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NRD_CSS_NS_DRAM1_MMAP,
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#if SPD_spmd && SPMD_SPM_AT_SEL2
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NRD_CSS_SPM_CORE_REGION_MMAP,
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#endif
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#if TRUSTED_BOARD_BOOT && !RESET_TO_BL2
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NRD_CSS_BL1_RW_MMAP,
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#endif
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NRD_CSS_GPT_L1_DRAM_MMAP,
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NRD_CSS_RMM_REGION_MMAP,
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{0}
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};
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#endif /* IMAGE_BL2 */
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#if IMAGE_BL31
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const mmap_region_t plat_arm_mmap[] = {
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NRD_CSS_SHARED_RAM_MMAP(0),
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#ifdef PLAT_ARM_MEM_PROT_ADDR
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NRD_ROS_V2M_MEM_PROTECT_MMAP,
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#endif
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NRD_CSS_PERIPH_MMAP(0),
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NRD_ROS_PLATFORM_PERIPH_MMAP,
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NRD_ROS_SYSTEM_PERIPH_MMAP,
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NRD_CSS_GPT_L1_DRAM_MMAP,
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NRD_CSS_EL3_RMM_SHARED_MEM_MMAP,
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NRD_CSS_GPC_SMMU_SMMUV3_MMAP,
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#if RESET_TO_BL31
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NRD_CSS_MAP_BL31_DTB,
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#endif
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{0}
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};
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#endif /* IMAGE_BL31 */
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ARM_CASSERT_MMAP
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#if TRUSTED_BOARD_BOOT
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int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
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{
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assert(heap_addr != NULL);
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assert(heap_size != NULL);
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return arm_get_mbedtls_heap(heap_addr, heap_size);
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}
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#endif
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void plat_arm_secure_wdt_start(void)
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{
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sbsa_wdog_start(NRD_CSS_AP_SECURE_WDOG_BASE,
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NRD_CSS_AP_SECURE_WDOG_TIMEOUT);
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}
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void plat_arm_secure_wdt_stop(void)
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{
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sbsa_wdog_stop(NRD_CSS_AP_SECURE_WDOG_BASE);
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}
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static sds_region_desc_t nrd_sds_regions[] = {
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{ .base = PLAT_ARM_SDS_MEM_BASE },
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};
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sds_region_desc_t *plat_sds_get_regions(unsigned int *region_count)
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{
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*region_count = ARRAY_SIZE(nrd_sds_regions);
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return nrd_sds_regions;
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}
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