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5096aeb2ba
This patch introduces the core support for enabling an SPMC in EL3 as per the FF-A spec. The current implemented functionality is targeted to enable initialization of the SPMC itself and initial support for bringing up a single S-EL1 SP. This includes initialization of the SPMC's internal state, parsing of an SP's manifest, preparing the cpu contexts and appropriate system registers for the Secure Partition. The spmc_smc_handler is the main handler for all incoming SMCs to the SPMC, FF-A ABI handlers and functionality will be implemented in subsequent patches. Signed-off-by: Marc Bonnici <marc.bonnici@arm.com> Change-Id: Ib33c240b91e54cbd018a69fec880d02adfbe12b9
99 lines
2.9 KiB
C
99 lines
2.9 KiB
C
/*
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* Copyright (c) 2019-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef SPMD_PRIVATE_H
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#define SPMD_PRIVATE_H
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#include <context.h>
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/*******************************************************************************
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* Constants that allow assembler code to preserve callee-saved registers of the
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* C runtime context while performing a security state switch.
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******************************************************************************/
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#define SPMD_C_RT_CTX_X19 0x0
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#define SPMD_C_RT_CTX_X20 0x8
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#define SPMD_C_RT_CTX_X21 0x10
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#define SPMD_C_RT_CTX_X22 0x18
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#define SPMD_C_RT_CTX_X23 0x20
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#define SPMD_C_RT_CTX_X24 0x28
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#define SPMD_C_RT_CTX_X25 0x30
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#define SPMD_C_RT_CTX_X26 0x38
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#define SPMD_C_RT_CTX_X27 0x40
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#define SPMD_C_RT_CTX_X28 0x48
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#define SPMD_C_RT_CTX_X29 0x50
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#define SPMD_C_RT_CTX_X30 0x58
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#define SPMD_C_RT_CTX_SIZE 0x60
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#define SPMD_C_RT_CTX_ENTRIES (SPMD_C_RT_CTX_SIZE >> DWORD_SHIFT)
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#ifndef __ASSEMBLER__
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#include <stdint.h>
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#include <lib/psci/psci_lib.h>
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#include <plat/common/platform.h>
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#include <services/ffa_svc.h>
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typedef enum spmc_state {
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SPMC_STATE_RESET = 0,
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SPMC_STATE_OFF,
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SPMC_STATE_ON_PENDING,
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SPMC_STATE_ON
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} spmc_state_t;
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/*
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* Data structure used by the SPM dispatcher (SPMD) in EL3 to track context of
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* the SPM core (SPMC) at the next lower EL.
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*/
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typedef struct spmd_spm_core_context {
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uint64_t c_rt_ctx;
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cpu_context_t cpu_ctx;
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spmc_state_t state;
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bool secure_interrupt_ongoing;
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} spmd_spm_core_context_t;
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/*
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* Reserve ID for NS physical FFA Endpoint.
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*/
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#define FFA_NS_ENDPOINT_ID U(0)
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/* Define SPMD target function IDs for framework messages to the SPMC */
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#define SPMD_FWK_MSG_BIT BIT(31)
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#define SPMD_FWK_MSG_PSCI U(0)
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#define SPMD_FWK_MSG_FFA_VERSION_REQ U(0x8)
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#define SPMD_FWK_MSG_FFA_VERSION_RESP U(0x9)
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/* Function to build SPMD to SPMC message */
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void spmd_build_spmc_message(gp_regs_t *gpregs, uint8_t target,
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unsigned long long message);
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/* Functions used to enter/exit SPMC synchronously */
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uint64_t spmd_spm_core_sync_entry(spmd_spm_core_context_t *ctx);
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__dead2 void spmd_spm_core_sync_exit(uint64_t rc);
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/* Assembly helpers */
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uint64_t spmd_spm_core_enter(uint64_t *c_rt_ctx);
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void __dead2 spmd_spm_core_exit(uint64_t c_rt_ctx, uint64_t ret);
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/* SPMD SPD power management handlers */
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extern const spd_pm_ops_t spmd_pm;
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/* SPMC entry point information helper */
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entry_point_info_t *spmd_spmc_ep_info_get(void);
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/* SPMC ID getter */
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uint16_t spmd_spmc_id_get(void);
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/* SPMC context on CPU based on mpidr */
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spmd_spm_core_context_t *spmd_get_context_by_mpidr(uint64_t mpidr);
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/* SPMC context on current CPU get helper */
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spmd_spm_core_context_t *spmd_get_context(void);
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int spmd_pm_secondary_ep_register(uintptr_t entry_point);
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bool spmd_check_address_in_binary_image(uint64_t address);
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#endif /* __ASSEMBLER__ */
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#endif /* SPMD_PRIVATE_H */
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