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74ec90e69b
while sbsa maintainers upstream decide whether new cpus types should be in, add fujitsu a64fx cpu type in advance Signed-off-by: Itaru Kitayama <itaru.kitayama@fujitsu.com> Change-Id: I521a62f1233f3fe6e92f040edaff2cc60a1bd874
49 lines
1.3 KiB
ArmAsm
49 lines
1.3 KiB
ArmAsm
/*
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* Copyright (c) 2022, Fujitsu Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <assert_macros.S>
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#include <a64fx.h>
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#include <cpu_macros.S>
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#include <plat_macros.S>
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func a64fx_core_pwr_dwn
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endfunc a64fx_core_pwr_dwn
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func a64fx_cluster_pwr_dwn
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endfunc a64fx_cluster_pwr_dwn
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#if REPORT_ERRATA
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/*
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* Errata printing function for A64FX. Must follow AAPCS.
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*/
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func a64fx_errata_report
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ret
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endfunc a64fx_errata_report
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#endif
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/* ---------------------------------------------
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* This function provides cpu specific
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* register information for crash reporting.
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* It needs to return with x6 pointing to
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* a list of register names in ascii and
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* x8 - x15 having values of registers to be
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* reported.
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* ---------------------------------------------
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*/
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.section .rodata.a64fx_regs, "aS"
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a64fx_regs: /* The ascii list of register names to be reported */
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.asciz ""
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func a64fx_cpu_reg_dump
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adr x6, a64fx_regs
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ret
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endfunc a64fx_cpu_reg_dump
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declare_cpu_ops a64fx, A64FX_MIDR, CPU_NO_RESET_FUNC \
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a64fx_core_pwr_dwn, \
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a64fx_cluster_pwr_dwn
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