Igor Podgainõi 6595f4cb39 fix(cm): fix context management SYSREG128 write macros ... This patch fixes a bug which was introduced in commit 3065513 related to improper saving of EL1 context in the context management library code when using 128-bit system registers. Bug explanation: The function el1_sysregs_context_save still used the normal macros that read all the system registers related to the EL1 context, which then involved casting them to uint64_t and eventually writing them to a memory structure. This means that the context management library was saving EL1-related SYSREG128 registers with the upper 64 bits zeroed out. Alternative macros had previously been introduced for the EL2 context in the aforementioned commit, but not for EL1. Some refactoring has also been done as part of this patch: - Re-added "common" back to write_el2_ctx_common_sysreg128 - Added dummy SYSREG128 macros for cases when some features are disabled - Removed some newlines Change-Id: I15aa2190794ac099a493e5f430220b1c81e1b558 Signed-off-by: Igor Podgainõi <igor.podgainoi@arm.com>		2024-12-16 18:14:51 +01:00
..
aarch32	refactor(cpufeat): add macro to simplify is_feat_xx_present	2024-05-02 12:16:16 -05:00
aarch64	fix(cm): fix context management SYSREG128 write macros	2024-12-16 18:14:51 +01:00
cpu_data_array.c	chore: update to use Arm word across TF-A	2023-08-08 15:12:30 +01:00
simd_ctx.c	feat(simd): introduce simd context helper APIs	2024-08-19 11:10:10 -05:00