arm-trusted-firmware/include/lib/extensions/amu.h
Chris Kay 742ca2307f feat(amu): enable per-core AMU auxiliary counters
This change makes AMU auxiliary counters configurable on a per-core
basis, controlled by `ENABLE_AMU_AUXILIARY_COUNTERS`.

Auxiliary counters can be described via the `HW_CONFIG` device tree if
the `ENABLE_AMU_FCONF` build option is enabled, or the platform must
otherwise implement the `plat_amu_topology` function.

A new phandle property for `cpu` nodes (`amu`) has been introduced to
the `HW_CONFIG` specification to allow CPUs to describe the view of
their own AMU:

```
cpu0: cpu@0 {
    ...

    amu = <&cpu0_amu>;
};
```

Multiple cores may share an `amu` handle if they implement the
same set of auxiliary counters.

AMU counters are described for one or more AMUs through the use of a new
`amus` node:

```
amus {
    cpu0_amu: amu-0 {
        #address-cells = <1>;
        #size-cells = <0>;

        counter@0 {
            reg = <0>;

            enable-at-el3;
        };

        counter@n {
            reg = <n>;

            ...
        };
    };
};
```

This structure describes the **auxiliary** (group 1) AMU counters.
Architected counters have architecturally-defined behaviour, and as
such do not require DTB entries.

These `counter` nodes support two properties:

- The `reg` property represents the counter register index.
- The presence of the `enable-at-el3` property determines whether
  the firmware should enable the counter prior to exiting EL3.

Change-Id: Ie43aee010518c5725a3b338a4899b0857caf4c28
Signed-off-by: Chris Kay <chris.kay@arm.com>
2021-10-26 12:15:33 +01:00

47 lines
998 B
C

/*
* Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef AMU_H
#define AMU_H
#include <stdbool.h>
#include <stdint.h>
#include <context.h>
#include <platform_def.h>
#if __aarch64__
void amu_enable(bool el2_unused, cpu_context_t *ctx);
#else
void amu_enable(bool el2_unused);
#endif
#if ENABLE_AMU_AUXILIARY_COUNTERS
/*
* AMU data for a single core.
*/
struct amu_core {
uint16_t enable; /* Mask of auxiliary counters to enable */
};
/*
* Topological platform data specific to the AMU.
*/
struct amu_topology {
struct amu_core cores[PLATFORM_CORE_COUNT]; /* Per-core data */
};
#if !ENABLE_AMU_FCONF
/*
* Retrieve the platform's AMU topology. A `NULL` return value is treated as a
* non-fatal error, in which case no auxiliary counters will be enabled.
*/
const struct amu_topology *plat_amu_topology(void);
#endif /* ENABLE_AMU_FCONF */
#endif /* ENABLE_AMU_AUXILIARY_COUNTERS */
#endif /* AMU_H */