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https://github.com/ARM-software/arm-trusted-firmware.git
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6176a4e56b
This set of patches adds a very minimal layer of USB enabling patches to clock.c. Unlike the watchdog or UART blocks the USB clocks pertain to PHYs, the main USB clock etc, not to different instances of the same IP block. As a result this patch-set takes the clock CCGR clock identifier directly rather than as an index of an instance of blocks of the same type. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
152 lines
3.7 KiB
C
152 lines
3.7 KiB
C
/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <mmio.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <imx_regs.h>
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#include <imx_clock.h>
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void imx_clock_target_set(unsigned int id, uint32_t val)
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{
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struct ccm *ccm = ((struct ccm *)CCM_BASE);
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uintptr_t addr;
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if (id > CCM_ROOT_CTRL_NUM)
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return;
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addr = (uintptr_t)&ccm->ccm_root_ctrl[id].ccm_target_root;
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mmio_write_32(addr, val);
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}
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void imx_clock_target_clr(unsigned int id, uint32_t val)
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{
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struct ccm *ccm = ((struct ccm *)CCM_BASE);
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uintptr_t addr;
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if (id > CCM_ROOT_CTRL_NUM)
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return;
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addr = (uintptr_t)&ccm->ccm_root_ctrl[id].ccm_target_root_clr;
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mmio_write_32(addr, val);
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}
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void imx_clock_gate_enable(unsigned int id, bool enable)
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{
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struct ccm *ccm = ((struct ccm *)CCM_BASE);
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uintptr_t addr;
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if (id > CCM_CLK_GATE_CTRL_NUM)
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return;
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/* TODO: add support for more than DOMAIN0 clocks */
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if (enable)
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addr = (uintptr_t)&ccm->ccm_clk_gate_ctrl[id].ccm_ccgr_set;
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else
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addr = (uintptr_t)&ccm->ccm_clk_gate_ctrl[id].ccm_ccgr_clr;
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mmio_write_32(addr, CCM_CCGR_SETTING0_DOM_CLK_ALWAYS);
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}
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void imx_clock_enable_uart(unsigned int uart_id, uint32_t uart_clk_en_bits)
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{
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unsigned int ccm_trgt_id = CCM_TRT_ID_UART1_CLK_ROOT + uart_id;
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unsigned int ccm_ccgr_id = CCM_CCGR_ID_UART1 + uart_id;
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/* Check for error */
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if (uart_id > MXC_MAX_UART_NUM)
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return;
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/* Set target register values */
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imx_clock_target_set(ccm_trgt_id, uart_clk_en_bits);
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/* Enable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_id, true);
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}
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void imx_clock_disable_uart(unsigned int uart_id)
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{
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unsigned int ccm_trgt_id = CCM_TRT_ID_UART1_CLK_ROOT + uart_id;
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unsigned int ccm_ccgr_id = CCM_CCGR_ID_UART1 + uart_id;
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/* Check for error */
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if (uart_id > MXC_MAX_UART_NUM)
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return;
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/* Disable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_id, false);
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/* Clear the target */
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imx_clock_target_clr(ccm_trgt_id, 0xFFFFFFFF);
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}
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void imx_clock_enable_usdhc(unsigned int usdhc_id, uint32_t usdhc_clk_en_bits)
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{
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unsigned int ccm_trgt_id = CCM_TRT_ID_USDHC1_CLK_ROOT + usdhc_id;
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unsigned int ccm_ccgr_id = CCM_CCGR_ID_USBHDC1 + usdhc_id;
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/* Check for error */
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if (usdhc_id > MXC_MAX_USDHC_NUM)
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return;
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/* Set target register values */
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imx_clock_target_set(ccm_trgt_id, usdhc_clk_en_bits);
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/* Enable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_id, true);
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}
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void imx_clock_enable_wdog(unsigned int wdog_id)
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{
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unsigned int ccm_ccgr_id = CCM_CCGR_ID_WDOG1 + wdog_id;
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/* Check for error */
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if (wdog_id > MXC_MAX_WDOG_NUM)
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return;
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/* Enable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_id, true);
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}
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void imx_clock_disable_wdog(unsigned int wdog_id)
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{
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unsigned int ccm_trgt_id = CCM_TRT_ID_WDOG_CLK_ROOT;
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unsigned int ccm_ccgr_id = CCM_CCGR_ID_WDOG1 + wdog_id;
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/* Check for error */
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if (wdog_id > MXC_MAX_WDOG_NUM)
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return;
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/* Disable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_id, false);
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/* Clear the target */
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imx_clock_target_clr(ccm_trgt_id, 0xFFFFFFFF);
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}
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void imx_clock_set_wdog_clk_root_bits(uint32_t wdog_clk_root_en_bits)
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{
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/* Enable the common clock root just once */
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imx_clock_target_set(CCM_TRT_ID_WDOG_CLK_ROOT, wdog_clk_root_en_bits);
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}
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void imx_clock_enable_usb(unsigned int ccm_ccgr_usb_id)
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{
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/* Enable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_usb_id, true);
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}
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void imx_clock_disable_usb(unsigned int ccm_ccgr_usb_id)
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{
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/* Disable the clock gate */
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imx_clock_gate_enable(ccm_ccgr_usb_id, false);
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}
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void imx_clock_set_usb_clk_root_bits(uint32_t usb_clk_root_en_bits)
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{
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/* Enable the common clock root just once */
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imx_clock_target_set(CCM_TRT_ID_USB_HSIC_CLK_ROOT, usb_clk_root_en_bits);
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}
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