mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-16 09:34:18 +00:00
60e8f3cfd5
This patch introduces a build flag which allows the xlat tables to be mapped in a read-only region within BL31 memory. It makes it much harder for someone who has acquired the ability to write to arbitrary secure memory addresses to gain control of the translation tables. The memory attributes of the descriptors describing the tables themselves are changed to read-only secure data. This change happens at the end of BL31 runtime setup. Until this point, the tables have read-write permissions. This gives a window of opportunity for changes to be made to the tables with the MMU on (e.g. reclaiming init code). No changes can be made to the tables with the MMU turned on from this point onwards. This change is also enabled for sp_min and tspd. To make all this possible, the base table was moved to .rodata. The penalty we pay is that now .rodata must be aligned to the size of the base table (512B alignment). Still, this is better than putting the base table with the higher level tables in the xlat_table section, as that would cost us a full 4KB page. Changing the tables from read-write to read-only cannot be done with the MMU on, as the break-before-make sequence would invalidate the descriptor which resolves the level 3 page table where that very descriptor is located. This would make the translation required for writing the changes impossible, generating an MMU fault. The caches are also flushed. Signed-off-by: Petre-Ionut Tudor <petre-ionut.tudor@arm.com> Change-Id: Ibe5de307e6dc94c67d6186139ac3973516430466
335 lines
10 KiB
Makefile
335 lines
10 KiB
Makefile
#
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# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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# Use the GICv3 driver on the FVP by default
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FVP_USE_GIC_DRIVER := FVP_GICV3
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# Use the SP804 timer instead of the generic one
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FVP_USE_SP804_TIMER := 0
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# Use fconf based io for FVP
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ifeq ($(BL2_AT_EL3), 0)
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USE_FCONF_BASED_IO := 1
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endif
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# Default cluster count for FVP
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FVP_CLUSTER_COUNT := 2
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# Default number of CPUs per cluster on FVP
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FVP_MAX_CPUS_PER_CLUSTER := 4
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# Default number of threads per CPU on FVP
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FVP_MAX_PE_PER_CPU := 1
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FVP_DT_PREFIX := fvp-base-gicv3-psci
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$(eval $(call assert_boolean,FVP_USE_SP804_TIMER))
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$(eval $(call add_define,FVP_USE_SP804_TIMER))
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# The FVP platform depends on this macro to build with correct GIC driver.
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$(eval $(call add_define,FVP_USE_GIC_DRIVER))
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# Pass FVP_CLUSTER_COUNT to the build system.
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$(eval $(call add_define,FVP_CLUSTER_COUNT))
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# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system.
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$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER))
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# Pass FVP_MAX_PE_PER_CPU to the build system.
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$(eval $(call add_define,FVP_MAX_PE_PER_CPU))
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# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2,
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# choose the CCI driver , else the CCN driver
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ifeq ($(FVP_CLUSTER_COUNT), 0)
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$(error "Incorrect cluster count specified for FVP port")
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else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2))
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FVP_INTERCONNECT_DRIVER := FVP_CCI
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else
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FVP_INTERCONNECT_DRIVER := FVP_CCN
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endif
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$(eval $(call add_define,FVP_INTERCONNECT_DRIVER))
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FVP_GICV3_SOURCES := drivers/arm/gic/common/gic_common.c \
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drivers/arm/gic/v3/gicv3_main.c \
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drivers/arm/gic/v3/gicv3_helpers.c \
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plat/common/plat_gicv3.c \
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plat/arm/common/arm_gicv3.c
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# Choose the GIC sources depending upon the how the FVP will be invoked
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ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3)
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FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \
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drivers/arm/gic/v3/gic500.c
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else ifeq (${FVP_USE_GIC_DRIVER},FVP_GIC600)
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FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \
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drivers/arm/gic/v3/gic600.c
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else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2)
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FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
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drivers/arm/gic/v2/gicv2_main.c \
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drivers/arm/gic/v2/gicv2_helpers.c \
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plat/common/plat_gicv2.c \
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plat/arm/common/arm_gicv2.c
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FVP_DT_PREFIX := fvp-base-gicv2-psci
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else
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$(error "Incorrect GIC driver chosen on FVP port")
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endif
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ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI)
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FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c
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else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN)
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FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \
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plat/arm/common/arm_ccn.c
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else
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$(error "Incorrect CCN driver chosen on FVP port")
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endif
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FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \
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plat/arm/board/fvp/fvp_security.c \
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plat/arm/common/arm_tzc400.c
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PLAT_INCLUDES := -Iplat/arm/board/fvp/include
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PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c
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FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
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ifeq (${ARCH}, aarch64)
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# select a different set of CPU files, depending on whether we compile for
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# hardware assisted coherency cores or not
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ifeq (${HW_ASSISTED_COHERENCY}, 0)
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# Cores used without DSU
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FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \
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lib/cpus/aarch64/cortex_a53.S \
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lib/cpus/aarch64/cortex_a57.S \
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lib/cpus/aarch64/cortex_a72.S \
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lib/cpus/aarch64/cortex_a73.S
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else
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# Cores used with DSU only
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ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
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# AArch64-only cores
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FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \
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lib/cpus/aarch64/cortex_a76ae.S \
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lib/cpus/aarch64/cortex_a77.S \
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lib/cpus/aarch64/neoverse_n1.S \
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lib/cpus/aarch64/neoverse_e1.S \
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lib/cpus/aarch64/neoverse_zeus.S \
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lib/cpus/aarch64/cortex_hercules.S \
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lib/cpus/aarch64/cortex_hercules_ae.S \
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lib/cpus/aarch64/cortex_klein.S \
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lib/cpus/aarch64/cortex_matterhorn.S \
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lib/cpus/aarch64/cortex_a65.S \
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lib/cpus/aarch64/cortex_a65ae.S
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endif
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# AArch64/AArch32 cores
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FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \
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lib/cpus/aarch64/cortex_a75.S
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endif
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else
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FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S
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endif
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BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
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drivers/arm/sp805/sp805.c \
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drivers/delay_timer/delay_timer.c \
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drivers/io/io_semihosting.c \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
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plat/arm/board/fvp/fvp_bl1_setup.c \
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plat/arm/board/fvp/fvp_err.c \
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plat/arm/board/fvp/fvp_io_storage.c \
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${FVP_CPU_LIBS} \
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${FVP_INTERCONNECT_SOURCES}
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ifeq (${FVP_USE_SP804_TIMER},1)
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BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
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else
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BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c
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endif
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BL2_SOURCES += drivers/arm/sp805/sp805.c \
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drivers/io/io_semihosting.c \
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lib/utils/mem_region.c \
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lib/semihosting/semihosting.c \
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lib/semihosting/${ARCH}/semihosting_call.S \
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plat/arm/board/fvp/fvp_bl2_setup.c \
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plat/arm/board/fvp/fvp_err.c \
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plat/arm/board/fvp/fvp_io_storage.c \
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plat/arm/common/arm_nor_psci_mem_protect.c \
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${FVP_SECURITY_SOURCES}
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ifeq (${BL2_AT_EL3},1)
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BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \
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plat/arm/board/fvp/fvp_bl2_el3_setup.c \
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${FVP_CPU_LIBS} \
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${FVP_INTERCONNECT_SOURCES}
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endif
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ifeq (${FVP_USE_SP804_TIMER},1)
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BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
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endif
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BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \
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${FVP_SECURITY_SOURCES}
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ifeq (${FVP_USE_SP804_TIMER},1)
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BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
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endif
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BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \
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drivers/arm/smmu/smmu_v3.c \
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drivers/delay_timer/delay_timer.c \
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drivers/cfi/v2m/v2m_flash.c \
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lib/utils/mem_region.c \
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plat/arm/board/fvp/fvp_bl31_setup.c \
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plat/arm/board/fvp/fvp_pm.c \
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plat/arm/board/fvp/fvp_topology.c \
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plat/arm/board/fvp/aarch64/fvp_helpers.S \
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plat/arm/common/arm_nor_psci_mem_protect.c \
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${FVP_CPU_LIBS} \
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${FVP_GIC_SOURCES} \
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${FVP_INTERCONNECT_SOURCES} \
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${FVP_SECURITY_SOURCES}
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ifeq (${FVP_USE_SP804_TIMER},1)
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BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
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else
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BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c
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endif
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# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env)
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ifdef UNIX_MK
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FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts
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FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \
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${PLAT}_fw_config.dts \
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${PLAT}_soc_fw_config.dts \
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${PLAT}_nt_fw_config.dts \
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)
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FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
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FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb
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FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
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ifeq (${SPD},tspd)
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FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts
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FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb
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# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config))
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endif
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ifeq (${SPD},spmd)
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FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts
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FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_spmc_manifest.dtb
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# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config))
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endif
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# Add the TB_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config))
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# Add the SOC_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config))
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# Add the NT_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config))
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FDT_SOURCES += ${FVP_HW_CONFIG_DTS}
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$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS)))
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# Add the HW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config))
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endif
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# Enable Activity Monitor Unit extensions by default
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ENABLE_AMU := 1
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# Enable dynamic mitigation support by default
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DYNAMIC_WORKAROUND_CVE_2018_3639 := 1
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# Enable reclaiming of BL31 initialisation code for secondary cores
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# stacks for FVP. However, don't enable reclaiming for clang.
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ifneq (${RESET_TO_BL31},1)
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ifeq ($(findstring clang,$(notdir $(CC))),)
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RECLAIM_INIT_CODE := 1
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endif
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endif
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ifeq (${ENABLE_AMU},1)
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BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \
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lib/cpus/aarch64/cpuamu_helpers.S
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ifeq (${HW_ASSISTED_COHERENCY}, 1)
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BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \
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lib/cpus/aarch64/neoverse_n1_pubsub.c
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endif
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endif
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ifeq (${RAS_EXTENSION},1)
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BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c
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endif
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ifneq (${ENABLE_STACK_PROTECTOR},0)
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PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c
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endif
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ifeq (${ARCH},aarch32)
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NEED_BL32 := yes
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endif
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# Enable the dynamic translation tables library.
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ifeq (${ARCH},aarch32)
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ifeq (${RESET_TO_SP_MIN},1)
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BL32_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
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endif
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else # AArch64
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ifeq (${RESET_TO_BL31},1)
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BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
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endif
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ifeq (${SPD},trusty)
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BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
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endif
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endif
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ifeq (${ALLOW_RO_XLAT_TABLES}, 1)
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ifeq (${ARCH},aarch32)
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BL32_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
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else # AArch64
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BL31_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
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ifeq (${SPD},tspd)
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BL32_CFLAGS += -DPLAT_RO_XLAT_TABLES=1
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endif
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endif
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endif
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ifeq (${USE_DEBUGFS},1)
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BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
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endif
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# Add support for platform supplied linker script for BL31 build
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$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
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ifneq (${BL2_AT_EL3}, 0)
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override BL1_SOURCES =
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endif
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include plat/arm/board/common/board_common.mk
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include plat/arm/common/arm_common.mk
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ifeq (${TRUSTED_BOARD_BOOT}, 1)
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BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
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BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c
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# FVP being a development platform, enable capability to disable Authentication
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# dynamically if TRUSTED_BOARD_BOOT is set.
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DYN_DISABLE_AUTH := 1
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endif
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