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5fb061e761
For v8-R64, especially R82, creating code to run BL1 at EL2, using MPU. Signed-off-by: Gary Morrison <gary.morrison@arm.com> Change-Id: I439ac3915b982ad1e61d24365bdd1584b3070425
213 lines
6 KiB
C
213 lines
6 KiB
C
/*
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* Copyright (c) 2021, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include "../../../../bl1/bl1_private.h"
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#include <arch.h>
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#include <arch_features.h>
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#include <arch_helpers.h>
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#include <bl1/bl1.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <drivers/auth/auth_mod.h>
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#include <drivers/console.h>
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#include <lib/cpus/errata_report.h>
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#include <lib/utils.h>
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#include <smccc_helpers.h>
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#include <tools_share/uuid.h>
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#include <plat/common/platform.h>
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#include <platform_def.h>
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static void bl1_load_bl2(void);
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#if ENABLE_PAUTH
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uint64_t bl1_apiakey[2];
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#endif
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/*******************************************************************************
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* Helper utility to calculate the BL2 memory layout taking into consideration
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* the BL1 RW data assuming that it is at the top of the memory layout.
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******************************************************************************/
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void bl1_calc_bl2_mem_layout(const meminfo_t *bl1_mem_layout,
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meminfo_t *bl2_mem_layout)
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{
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assert(bl1_mem_layout != NULL);
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assert(bl2_mem_layout != NULL);
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/*
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* Remove BL1 RW data from the scope of memory visible to BL2.
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* This is assuming BL1 RW data is at the top of bl1_mem_layout.
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*/
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assert(bl1_mem_layout->total_base < BL1_RW_BASE);
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bl2_mem_layout->total_base = bl1_mem_layout->total_base;
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bl2_mem_layout->total_size = BL1_RW_BASE - bl1_mem_layout->total_base;
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flush_dcache_range((uintptr_t)bl2_mem_layout, sizeof(meminfo_t));
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}
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/*******************************************************************************
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* Setup function for BL1.
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******************************************************************************/
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void bl1_setup(void)
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{
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/* Perform early platform-specific setup */
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bl1_early_platform_setup();
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/* Perform late platform-specific setup */
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bl1_plat_arch_setup();
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#if CTX_INCLUDE_PAUTH_REGS
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/*
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* Assert that the ARMv8.3-PAuth registers are present or an access
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* fault will be triggered when they are being saved or restored.
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*/
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assert(is_armv8_3_pauth_present());
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#endif /* CTX_INCLUDE_PAUTH_REGS */
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}
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/*******************************************************************************
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* Function to perform late architectural and platform specific initialization.
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* It also queries the platform to load and run next BL image. Only called
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* by the primary cpu after a cold boot.
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******************************************************************************/
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void bl1_main(void)
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{
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unsigned int image_id;
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/* Announce our arrival */
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NOTICE(FIRMWARE_WELCOME_STR);
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NOTICE("BL1: %s\n", version_string);
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NOTICE("BL1: %s\n", build_message);
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INFO("BL1: RAM %p - %p\n", (void *)BL1_RAM_BASE, (void *)BL1_RAM_LIMIT);
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print_errata_status();
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#if ENABLE_ASSERTIONS
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u_register_t val;
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/*
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* Ensure that MMU/Caches and coherency are turned on
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*/
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val = read_sctlr_el2();
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assert((val & SCTLR_M_BIT) != 0U);
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assert((val & SCTLR_C_BIT) != 0U);
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assert((val & SCTLR_I_BIT) != 0U);
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/*
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* Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the
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* provided platform value
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*/
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val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK;
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/*
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* If CWG is zero, then no CWG information is available but we can
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* at least check the platform value is less than the architectural
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* maximum.
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*/
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if (val != 0) {
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assert(SIZE_FROM_LOG2_WORDS(val) == CACHE_WRITEBACK_GRANULE);
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} else {
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assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE);
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}
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#endif /* ENABLE_ASSERTIONS */
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/* Perform remaining generic architectural setup from EL2 */
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bl1_arch_setup();
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#if TRUSTED_BOARD_BOOT
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/* Initialize authentication module */
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auth_mod_init();
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#endif /* TRUSTED_BOARD_BOOT */
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/* Perform platform setup in BL1. */
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bl1_platform_setup();
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#if ENABLE_PAUTH
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/* Store APIAKey_EL1 key */
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bl1_apiakey[0] = read_apiakeylo_el1();
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bl1_apiakey[1] = read_apiakeyhi_el1();
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#endif /* ENABLE_PAUTH */
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/* Get the image id of next image to load and run. */
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image_id = bl1_plat_get_next_image_id();
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/*
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* We currently interpret any image id other than
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* BL2_IMAGE_ID as the start of firmware update.
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*/
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if (image_id == BL2_IMAGE_ID) {
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bl1_load_bl2();
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} else {
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NOTICE("BL1-FWU: *******FWU Process Started*******\n");
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}
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bl1_prepare_next_image(image_id);
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console_flush();
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}
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/*******************************************************************************
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* This function locates and loads the BL2 raw binary image in the trusted SRAM.
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* Called by the primary cpu after a cold boot.
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* TODO: Add support for alternative image load mechanism e.g using virtio/elf
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* loader etc.
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******************************************************************************/
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static void bl1_load_bl2(void)
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{
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image_desc_t *desc;
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image_info_t *info;
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int err;
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/* Get the image descriptor */
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desc = bl1_plat_get_image_desc(BL2_IMAGE_ID);
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assert(desc != NULL);
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/* Get the image info */
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info = &desc->image_info;
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INFO("BL1: Loading BL2\n");
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err = bl1_plat_handle_pre_image_load(BL2_IMAGE_ID);
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if (err != 0) {
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ERROR("Failure in pre image load handling of BL2 (%d)\n", err);
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plat_error_handler(err);
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}
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err = load_auth_image(BL2_IMAGE_ID, info);
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if (err != 0) {
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ERROR("Failed to load BL2 firmware.\n");
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plat_error_handler(err);
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}
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/* Allow platform to handle image information. */
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err = bl1_plat_handle_post_image_load(BL2_IMAGE_ID);
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if (err != 0) {
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ERROR("Failure in post image load handling of BL2 (%d)\n", err);
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plat_error_handler(err);
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}
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NOTICE("BL1: Booting BL2\n");
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}
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/*******************************************************************************
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* Function called just before handing over to the next BL to inform the user
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* about the boot progress. In debug mode, also print details about the BL
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* image's execution context.
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******************************************************************************/
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void bl1_print_next_bl_ep_info(const entry_point_info_t *bl_ep_info)
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{
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NOTICE("BL1: Booting BL31\n");
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print_entry_point_info(bl_ep_info);
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}
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#if SPIN_ON_BL1_EXIT
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void print_debug_loop_message(void)
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{
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NOTICE("BL1: Debug loop, spinning forever\n");
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NOTICE("BL1: Please connect the debugger to continue\n");
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}
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#endif
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