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5dd9dbb5bf
Various CPU drivers in ARM Trusted Firmware register functions to handle
power-down operations. At present, separate functions are registered to
power down individual cores and clusters.
This scheme operates on the basis of core and cluster, and doesn't cater
for extending the hierarchy for power-down operations. For example,
future CPUs might support multiple threads which might need powering
down individually.
This patch therefore reworks the CPU operations framework to allow for
registering power down handlers on specific level basis. Henceforth:
- Generic code invokes CPU power down operations by the level
required.
- CPU drivers explicitly mention CPU_NO_RESET_FUNC when the CPU has no
reset function.
- CPU drivers register power down handlers as a list: a mandatory
handler for level 0, and optional handlers for higher levels.
All existing CPU drivers are adapted to the new CPU operations framework
without needing any functional changes within.
Also update firmware design guide.
Change-Id: I1826842d37a9e60a9e85fdcee7b4b8f6bc1ad043
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
142 lines
4.5 KiB
ArmAsm
142 lines
4.5 KiB
ArmAsm
/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __CPU_MACROS_S__
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#define __CPU_MACROS_S__
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#include <arch.h>
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#define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \
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(MIDR_PN_MASK << MIDR_PN_SHIFT)
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/* The number of CPU operations allowed */
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#define CPU_MAX_PWR_DWN_OPS 2
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/* Special constant to specify that CPU has no reset function */
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#define CPU_NO_RESET_FUNC 0
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/* Word size for 32-bit CPUs */
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#define CPU_WORD_SIZE 4
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/*
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* Define the offsets to the fields in cpu_ops structure.
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*/
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.struct 0
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CPU_MIDR: /* cpu_ops midr */
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.space 4
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/* Reset fn is needed during reset */
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#if IMAGE_BL1 || IMAGE_BL32
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CPU_RESET_FUNC: /* cpu_ops reset_func */
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.space 4
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#endif
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#if IMAGE_BL32 /* The power down core and cluster is needed only in BL32 */
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CPU_PWR_DWN_OPS: /* cpu_ops power down functions */
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.space (4 * CPU_MAX_PWR_DWN_OPS)
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#endif
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CPU_OPS_SIZE = .
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/*
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* Write given expressions as words
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*
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* _count:
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* Write at least _count words. If the given number of expressions
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* is less than _count, repeat the last expression to fill _count
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* words in total
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* _rest:
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* Optional list of expressions. _this is for parameter extraction
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* only, and has no significance to the caller
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*
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* Invoked as:
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* fill_constants 2, foo, bar, blah, ...
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*/
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.macro fill_constants _count:req, _this, _rest:vararg
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.ifgt \_count
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/* Write the current expression */
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.ifb \_this
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.error "Nothing to fill"
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.endif
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.word \_this
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/* Invoke recursively for remaining expressions */
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.ifnb \_rest
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fill_constants \_count-1, \_rest
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.else
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fill_constants \_count-1, \_this
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.endif
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.endif
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.endm
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/*
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* Declare CPU operations
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*
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* _name:
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* Name of the CPU for which operations are being specified
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* _midr:
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* Numeric value expected to read from CPU's MIDR
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* _resetfunc:
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* Reset function for the CPU. If there's no CPU reset function,
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* specify CPU_NO_RESET_FUNC
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* _power_down_ops:
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* Comma-separated list of functions to perform power-down
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* operatios on the CPU. At least one, and up to
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* CPU_MAX_PWR_DWN_OPS number of functions may be specified.
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* Starting at power level 0, these functions shall handle power
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* down at subsequent power levels. If there aren't exactly
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* CPU_MAX_PWR_DWN_OPS functions, the last specified one will be
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* used to handle power down at subsequent levels
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*/
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.macro declare_cpu_ops _name:req, _midr:req, _resetfunc:req, \
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_power_down_ops:vararg
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.section cpu_ops, "a"
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.align 2
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.type cpu_ops_\_name, %object
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.word \_midr
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#if IMAGE_BL1 || IMAGE_BL32
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.word \_resetfunc
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#endif
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#if IMAGE_BL32
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1:
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/* Insert list of functions */
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fill_constants CPU_MAX_PWR_DWN_OPS, \_power_down_ops
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2:
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/*
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* Error if no or more than CPU_MAX_PWR_DWN_OPS were specified in the
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* list
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*/
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.ifeq 2b - 1b
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.error "At least one power down function must be specified"
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.else
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.iflt 2b - 1b - (CPU_MAX_PWR_DWN_OPS * CPU_WORD_SIZE)
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.error "More than CPU_MAX_PWR_DWN_OPS functions specified"
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.endif
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.endif
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#endif
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.endm
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#endif /* __CPU_MACROS_S__ */
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