John Powell 5d796b3a25 fix(errata): workaround for Cortex-A78 erratum 2376745 ... Cortex-A78 erratum 2376745 is a cat B erratum that applies to revisions r0p0 - r1p2 and is still open. The workaround is to set bit[0] of CPUACTLR2 which will force PLDW/PFRM ST to behave like PLD/PRFM LD and not cause invalidation to other PE caches. SDEN can be found here: https://developer.arm.com/documentation/SDEN1401784 Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I6f1a3a7d613c5ed182a7028f912e0f6ae3aa7f98		2022-05-09 19:09:22 +02:00
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alt-boot-flows.rst	doc: Split the User Guide into multiple files	2019-11-27 10:45:54 +00:00
auth-framework.rst	Cleanup the code for TBBR CoT descriptors	2020-05-19 05:05:19 +01:00
cpu-specific-build-macros.rst	fix(errata): workaround for Cortex-A78 erratum 2376745	2022-05-09 19:09:22 +02:00
firmware-design.rst	docs(fvp): update loading addresses of HW_CONFIG	2022-04-28 07:09:53 +01:00
index.rst	doc: Split the User Guide into multiple files	2019-11-27 10:45:54 +00:00
interrupt-framework-design.rst	Fix broken links to various sections across docs	2020-08-03 09:55:04 -05:00
psci-pd-tree.rst	doc: Set correct syntax highlighting style	2019-05-22 11:28:17 +01:00
reset-design.rst	docs(bl31): aarch64: RESET_TO_BL31_WITH_PARAMS	2022-04-29 22:54:34 +02:00
trusted-board-boot-build.rst	Mention COT build option in trusted-board-boot-build.rst	2020-03-12 17:11:26 +01:00
trusted-board-boot.rst	fix: remove "experimental" tag for stable features	2021-10-22 10:49:20 +01:00