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b5e6d09294
Add a driver for the Cadence UART which is found in Xilinx Zynq SOCs. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
50 lines
2 KiB
C
50 lines
2 KiB
C
/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __CADENCE_UART_H__
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#define __CADENCE_UART_H__
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/* This is very minimalistic and will only work in QEMU. */
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/* CADENCE Registers */
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#define R_UART_CR 0
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#define R_UART_CR_RXRST (1 << 0) /* RX logic reset */
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#define R_UART_CR_TXRST (1 << 1) /* TX logic reset */
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#define R_UART_CR_RX_EN (1 << 2) /* RX enabled */
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#define R_UART_CR_TX_EN (1 << 4) /* TX enabled */
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#define R_UART_SR 0x2C
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#define UART_SR_INTR_REMPTY_BIT 1
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#define UART_SR_INTR_TFUL_BIT 4
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#define R_UART_TX 0x30
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#define R_UART_RX 0x30
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#endif
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