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https://github.com/ARM-software/arm-trusted-firmware.git
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564e073cd5
Revise the AST2700 boot flow to the RESET_TO_BL31 scheme. The execution of BL1/2 can be saved from ARM CA35 while most low level platform initialization are moved to a preceding MCU. This patch updates the build configuration and also adds the SMP mailbox setup code to hold secondary cores until they are being waken up. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Change-Id: I7e0aa6416b92b97036153db1d9a26baaa41b7b18
27 lines
633 B
C
27 lines
633 B
C
/*
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* Copyright (c) 2023, Aspeed Technology Inc.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PLATFORM_REG_H
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#define PLATFORM_REG_H
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/* GIC */
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#define GICD_BASE U(0x12200000)
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#define GICD_SIZE U(0x10000)
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#define GICR_BASE U(0x12280000)
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#define GICR_SIZE U(0x100000)
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/* UART */
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#define UART_BASE U(0x14c33000)
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#define UART12_BASE (UART_BASE + 0xb00)
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/* CPU-die SCU */
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#define SCU_CPU_BASE U(0x12c02000)
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#define SCU_CPU_SMP_EP0 (SCU_CPU_BASE + 0x780)
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#define SCU_CPU_SMP_EP1 (SCU_CPU_BASE + 0x788)
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#define SCU_CPU_SMP_EP2 (SCU_CPU_BASE + 0x790)
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#define SCU_CPU_SMP_EP3 (SCU_CPU_BASE + 0x798)
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#endif /* PLATFORM_REG_H */
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