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This patch allows the platform to validate the power_state and entrypoint information from the normal world early on in PSCI calls so that we can return the error safely. New optional pm_ops hooks `validate_power_state` and `validate_ns_entrypoint` are introduced to do this. As a result of these changes, all the other pm_ops handlers except the PSCI_ON handler are expected to be successful. Also, the PSCI implementation will now assert if a PSCI API is invoked without the corresponding pm_ops handler being registered by the platform. NOTE : PLATFORM PORTS WILL BREAK ON MERGE OF THIS COMMIT. The pm hooks have 2 additional optional callbacks and the return type of the other hooks have changed. Fixes ARM-Software/tf-issues#229 Change-Id: I036bc0cff2349187c7b8b687b9ee0620aa7e24dc
240 lines
8 KiB
C
240 lines
8 KiB
C
/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch.h>
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#include <arch_helpers.h>
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#include <assert.h>
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#include <debug.h>
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#include <string.h>
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#include "psci_private.h"
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typedef void (*afflvl_off_handler_t)(aff_map_node_t *node);
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/*******************************************************************************
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* The next three functions implement a handler for each supported affinity
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* level which is called when that affinity level is turned off.
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******************************************************************************/
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static void psci_afflvl0_off(aff_map_node_t *cpu_node)
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{
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assert(cpu_node->level == MPIDR_AFFLVL0);
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/*
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* Arch. management. Perform the necessary steps to flush all
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* cpu caches.
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*/
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psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL0);
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assert(psci_plat_pm_ops->affinst_off);
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/*
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* Plat. management: Perform platform specific actions to turn this
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* cpu off e.g. exit cpu coherency, program the power controller etc.
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*/
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psci_plat_pm_ops->affinst_off(cpu_node->level,
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psci_get_phys_state(cpu_node));
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}
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static void psci_afflvl1_off(aff_map_node_t *cluster_node)
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{
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/* Sanity check the cluster level */
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assert(cluster_node->level == MPIDR_AFFLVL1);
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/*
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* Arch. Management. Flush all levels of caches to PoC if
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* the cluster is to be shutdown.
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*/
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psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL1);
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assert(psci_plat_pm_ops->affinst_off);
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/*
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* Plat. Management. Allow the platform to do its cluster
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* specific bookeeping e.g. turn off interconnect coherency,
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* program the power controller etc.
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*/
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psci_plat_pm_ops->affinst_off(cluster_node->level,
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psci_get_phys_state(cluster_node));
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}
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static void psci_afflvl2_off(aff_map_node_t *system_node)
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{
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/* Cannot go beyond this level */
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assert(system_node->level == MPIDR_AFFLVL2);
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/*
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* Keep the physical state of the system handy to decide what
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* action needs to be taken
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*/
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/*
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* Arch. Management. Flush all levels of caches to PoC if
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* the system is to be shutdown.
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*/
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psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL2);
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assert(psci_plat_pm_ops->affinst_off);
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/*
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* Plat. Management : Allow the platform to do its bookeeping
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* at this affinity level
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*/
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psci_plat_pm_ops->affinst_off(system_node->level,
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psci_get_phys_state(system_node));
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}
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static const afflvl_off_handler_t psci_afflvl_off_handlers[] = {
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psci_afflvl0_off,
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psci_afflvl1_off,
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psci_afflvl2_off,
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};
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/*******************************************************************************
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* This function takes an array of pointers to affinity instance nodes in the
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* topology tree and calls the off handler for the corresponding affinity
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* levels
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******************************************************************************/
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static void psci_call_off_handlers(aff_map_node_t *mpidr_nodes[],
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int start_afflvl,
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int end_afflvl)
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{
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int level;
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aff_map_node_t *node;
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for (level = start_afflvl; level <= end_afflvl; level++) {
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node = mpidr_nodes[level];
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if (node == NULL)
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continue;
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psci_afflvl_off_handlers[level](node);
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}
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}
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/*******************************************************************************
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* Top level handler which is called when a cpu wants to power itself down.
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* It's assumed that along with turning the cpu off, higher affinity levels will
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* be turned off as far as possible. It traverses through all the affinity
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* levels performing generic, architectural, platform setup and state management
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* e.g. for a cluster that's to be powered off, it will call the platform
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* specific code which will disable coherency at the interconnect level if the
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* cpu is the last in the cluster. For a cpu it could mean programming the power
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* the power controller etc.
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*
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* The state of all the relevant affinity levels is changed prior to calling the
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* affinity level specific handlers as their actions would depend upon the state
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* the affinity level is about to enter.
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*
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* The affinity level specific handlers are called in ascending order i.e. from
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* the lowest to the highest affinity level implemented by the platform because
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* to turn off affinity level X it is neccesary to turn off affinity level X - 1
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* first.
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******************************************************************************/
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int psci_afflvl_off(int start_afflvl,
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int end_afflvl)
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{
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int rc;
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mpidr_aff_map_nodes_t mpidr_nodes;
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unsigned int max_phys_off_afflvl;
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/*
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* Collect the pointers to the nodes in the topology tree for
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* each affinity instance in the mpidr. If this function does
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* not return successfully then either the mpidr or the affinity
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* levels are incorrect. Either way, this an internal TF error
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* therefore assert.
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*/
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rc = psci_get_aff_map_nodes(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
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start_afflvl,
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end_afflvl,
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mpidr_nodes);
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assert(rc == PSCI_E_SUCCESS);
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/*
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* This function acquires the lock corresponding to each affinity
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* level so that by the time all locks are taken, the system topology
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* is snapshot and state management can be done safely.
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*/
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psci_acquire_afflvl_locks(start_afflvl,
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end_afflvl,
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mpidr_nodes);
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/*
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* Call the cpu off handler registered by the Secure Payload Dispatcher
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* to let it do any bookkeeping. Assume that the SPD always reports an
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* E_DENIED error if SP refuse to power down
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*/
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if (psci_spd_pm && psci_spd_pm->svc_off) {
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rc = psci_spd_pm->svc_off(0);
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if (rc)
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goto exit;
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}
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/*
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* This function updates the state of each affinity instance
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* corresponding to the mpidr in the range of affinity levels
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* specified.
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*/
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psci_do_afflvl_state_mgmt(start_afflvl,
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end_afflvl,
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mpidr_nodes,
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PSCI_STATE_OFF);
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max_phys_off_afflvl = psci_find_max_phys_off_afflvl(start_afflvl,
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end_afflvl,
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mpidr_nodes);
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assert(max_phys_off_afflvl != PSCI_INVALID_DATA);
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/* Stash the highest affinity level that will enter the OFF state. */
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psci_set_max_phys_off_afflvl(max_phys_off_afflvl);
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/* Perform generic, architecture and platform specific handling */
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psci_call_off_handlers(mpidr_nodes,
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start_afflvl,
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end_afflvl);
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/*
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* Invalidate the entry for the highest affinity level stashed earlier.
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* This ensures that any reads of this variable outside the power
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* up/down sequences return PSCI_INVALID_DATA.
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*
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*/
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psci_set_max_phys_off_afflvl(PSCI_INVALID_DATA);
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exit:
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/*
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* Release the locks corresponding to each affinity level in the
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* reverse order to which they were acquired.
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*/
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psci_release_afflvl_locks(start_afflvl,
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end_afflvl,
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mpidr_nodes);
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return rc;
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}
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