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Change-Id: I2bd48441359468efb9e94fd2fffb079683f7a7fd Signed-off-by: Mario Bălănică <mariobalanica02@gmail.com>
72 lines
1.8 KiB
C
72 lines
1.8 KiB
C
/*
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* Copyright (c) 2016-2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef RPI_HW_H
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#define RPI_HW_H
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#include <lib/utils_def.h>
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/*
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* Peripherals
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*/
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#define RPI_IO_BASE ULL(0xFC000000)
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#define RPI_IO_SIZE ULL(0x04000000)
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#define RPI_LEGACY_BASE (ULL(0x02000000) + RPI_IO_BASE)
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/*
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* ARM <-> VideoCore mailboxes
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*/
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#define RPI3_MBOX_OFFSET ULL(0x0000B880)
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#define RPI3_MBOX_BASE (RPI_LEGACY_BASE + RPI3_MBOX_OFFSET)
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/*
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* Power management, reset controller, watchdog.
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*/
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#define RPI3_IO_PM_OFFSET ULL(0x00100000)
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#define RPI3_PM_BASE (RPI_LEGACY_BASE + RPI3_IO_PM_OFFSET)
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/*
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* Hardware random number generator.
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*/
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#define RPI3_IO_RNG_OFFSET ULL(0x00104000)
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#define RPI3_RNG_BASE (RPI_LEGACY_BASE + RPI3_IO_RNG_OFFSET)
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/*
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* Serial ports:
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* 'Mini UART' in the BCM docucmentation is the 8250 compatible UART.
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* There is also a PL011 UART, multiplexed to the same pins.
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*/
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#define RPI4_IO_MINI_UART_OFFSET ULL(0x00215040)
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#define RPI4_MINI_UART_BASE (RPI_LEGACY_BASE + RPI4_IO_MINI_UART_OFFSET)
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#define RPI4_IO_PL011_UART_OFFSET ULL(0x00201000)
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#define RPI4_PL011_UART_BASE (RPI_LEGACY_BASE + RPI4_IO_PL011_UART_OFFSET)
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#define RPI4_PL011_UART_CLOCK ULL(48000000)
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/*
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* GPIO controller
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*/
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#define RPI3_IO_GPIO_OFFSET ULL(0x00200000)
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#define RPI3_GPIO_BASE (RPI_LEGACY_BASE + RPI3_IO_GPIO_OFFSET)
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/*
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* SDHost controller
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*/
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#define RPI3_IO_SDHOST_OFFSET ULL(0x00202000)
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#define RPI3_SDHOST_BASE (RPI_LEGACY_BASE + RPI3_IO_SDHOST_OFFSET)
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/*
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* GIC interrupt controller
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*/
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#define RPI_HAVE_GIC
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#define RPI4_GIC_GICD_BASE ULL(0xff841000)
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#define RPI4_GIC_GICC_BASE ULL(0xff842000)
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#define RPI4_LOCAL_CONTROL_BASE_ADDRESS ULL(0xff800000)
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#define RPI4_LOCAL_CONTROL_PRESCALER ULL(0xff800008)
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#endif /* RPI_HW_H */
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